Ask the shell for its own grid, and report the heap on every boot

Two small changes that the geometry sweep needed.

The firmware asked for 80x24 and let the shell clamp it, which made this file a second
opinion about the board's geometry - one opinion too many, and wrong the moment the shell
could render more than that. It now asks for 255x255 so the shell's own ceiling is what
governs, and the shell reports what it settled on.

And the heap is printed on every boot rather than only when init fails. A geometry that
fits with 2 KB to spare and one that fits with 80 KB are not the same answer, and from the
host the difference was invisible. That line is what showed the sweep that memory had
stopped being the constraint at all: 336 KB free at every size tried, while '.bss' - the
shadow grid, sized at comptime - is what actually runs out.

1 files changed, 15 insertions, 1 deletions

diff --git a/src/pardes/app.zig b/src/pardes/app.zig
index 34f427d..1302556 100644
--- a/src/pardes/app.zig
+++ b/src/pardes/app.zig
@@ -218,7 +218,10 @@ export fn zig_main() noreturn {
     gpa_heap = heapmod.Heap.init(heap);
     _ = uart.drainInput();
 
-    const rc = pardes_p4_init(&editor_allocator, writeOut, null, 80, 24);
+    // Ask for more than any grid this board will ever render, so the SHELL's own ceiling is what
+    // governs - it clamps to `-Dp4-cols`/`-Dp4-rows` and reports the result. Naming 80x24 here made
+    // the firmware a second opinion about the geometry, which is one opinion too many.
+    const rc = pardes_p4_init(&editor_allocator, writeOut, null, 255, 255);
 
     if (rc != 0) {
         soc.rom.print("MARK PARDES_INIT_FAIL rc=%u\r\n", .{rc});
@@ -229,6 +232,17 @@ export fn zig_main() noreturn {
         while (true) {}
     }
 
+    // The HEAP, after the editor has taken what it needs. This is the number that decides how large
+    // a grid the board can drive, so it is printed on every boot rather than only on failure: a
+    // geometry that fits with 2 KB to spare and one that fits with 80 KB are not the same answer,
+    // and the difference is invisible from the host otherwise.
+    {
+        const s = gpa_heap.stats();
+        soc.rom.print("MARK PARDES_HEAP free=%u largest=%u blocks=%u\r\n", .{
+            s.free, s.largest_free, s.free_blocks,
+        });
+    }
+
     // The CPU clock, measured rather than assumed. Every cycle count this firmware reports is
     // divided by it somewhere, and `src/io/chip.zig` records it as "a measured ~90 MHz" that
     // nothing here reconfigures - so it is worth printing rather than remembering. The systimer is