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authorGabriel Schneider <[email protected]>2026-08-25 15:42:03 -0300
committerGabriel Schneider <[email protected]>2026-08-25 16:17:41 -0300
commit9ab0cbb93dd7678dcc8e86e164325e7d1b8ea7c6 (patch)
tree21c382587835328927c505b3ea3c2b30649baa5f /cpu-docs/espressif-software
parent894524a2e10296d6db4e82e0fe98b1802910ab77 (diff)
downloadesp32p4-9ab0cbb93dd7678dcc8e86e164325e7d1b8ea7c6.tar.gz
esp32p4-9ab0cbb93dd7678dcc8e86e164325e7d1b8ea7c6.zip
Archive the vendor and ISA documents this port was read against
`cpu-docs/` holds the documents behind the reverse-engineering in this repo, and `cpu-docs/manifests/` records each source URL with a sha256, a byte count and a page count. The manifests ARE the archive as far as this history is concerned: 121 MB of vendor PDFs are ignored, exactly as `/zig-pkg/` is, because a re-fetch is one command away and the manifest makes a drifted document detectable. The small text sources stay tracked instead of ignored, because Espressif publishes them in no other form - the esptool serial protocol, firmware image format and boot-mode selection pages, and the P4's custom PIE/SIMD instruction reference. There is no PDF to re-fetch in their place.
Diffstat (limited to 'cpu-docs/espressif-software')
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-rw-r--r--cpu-docs/espressif-software/esptool_boot-mode-selection_v5.3.1.rst373
-rw-r--r--cpu-docs/espressif-software/esptool_firmware-image-format_esp32p4_v5.3.1.html299
-rw-r--r--cpu-docs/espressif-software/esptool_firmware-image-format_v5.3.1.rst209
-rw-r--r--cpu-docs/espressif-software/esptool_serial-protocol_esp32p4_v5.3.1.html795
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+<li class="toctree-l2 current"><a class="current reference internal" href="#">Boot Mode Selection</a><ul>
+<li class="toctree-l3"><a class="reference internal" href="#select-bootloader-mode">Select Bootloader Mode</a><ul>
+<li class="toctree-l4"><a class="reference internal" href="#gpio35">GPIO35</a></li>
+<li class="toctree-l4"><a class="reference internal" href="#gpio36">GPIO36</a></li>
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+ <section id="boot-mode-selection">
+<span id="boot-mode"></span><h1>Boot Mode Selection<a class="headerlink" href="#boot-mode-selection" title="Permalink to this heading"></a></h1>
+<p>This guide explains how to select the boot mode correctly and describes the boot log messages of ESP32-P4.</p>
+<div class="admonition warning">
+<p class="admonition-title">Warning</p>
+<p>The ESP32-P4 has a 45k ohm internal pull-up/pull-down resistor at GPIO35 (and other pins). If you want to connect a switch button to enter the boot mode, this has to be a strong pull-down. For example a 10k resistor to GND.</p>
+</div>
+<p>Information about ESP32-P4 strapping pins can also be found in the <a class="reference external" href="https://www.espressif.com/sites/default/files/documentation/esp32-p4_datasheet_en.pdf">ESP32-P4 Datasheet</a>, section “Strapping Pins”.</p>
+<p>On many development boards with built-in USB/Serial, <code class="docutils literal notranslate"><span class="pre">esptool</span></code> can automatically reset the board into bootloader mode. For other configurations or custom hardware, you will need to check the orientation of some “strapping pins” to get the correct boot mode:</p>
+<section id="select-bootloader-mode">
+<h2>Select Bootloader Mode<a class="headerlink" href="#select-bootloader-mode" title="Permalink to this heading"></a></h2>
+<section id="gpio35">
+<h3>GPIO35<a class="headerlink" href="#gpio35" title="Permalink to this heading"></a></h3>
+<p>The ESP32-P4 will enter the serial bootloader when GPIO35 is held low on reset. Otherwise it will run the program in flash.</p>
+<table class="docutils align-default">
+<colgroup>
+<col style="width: 28.6%" />
+<col style="width: 71.4%" />
+</colgroup>
+<thead>
+<tr class="row-odd"><th class="head"><p>GPIO35 Input</p></th>
+<th class="head"><p>Mode</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>Low/GND</p></td>
+<td><p>ROM serial bootloader for esptool</p></td>
+</tr>
+<tr class="row-odd"><td><p>High/VCC</p></td>
+<td><p>Normal execution mode</p></td>
+</tr>
+</tbody>
+</table>
+<p>GPIO35 has an internal pullup resistor, so if it is left unconnected then it will pull high.</p>
+<p>Many boards use a button marked “Flash” (or “BOOT” on some Espressif development boards) that pulls GPIO35 low when pressed.</p>
+</section>
+<section id="gpio36">
+<h3>GPIO36<a class="headerlink" href="#gpio36" title="Permalink to this heading"></a></h3>
+<p>GPIO36 must also be driven High, in order to enter the serial bootloader reliably. The strapping combination of GPIO36 = 0 and GPIO35 = 0 is invalid and will trigger unexpected behavior.</p>
+<p>In normal boot mode (GPIO35 high), GPIO36 is ignored.</p>
+</section>
+<section id="other-pins">
+<h3>Other Pins<a class="headerlink" href="#other-pins" title="Permalink to this heading"></a></h3>
+<p>As well as the above mentioned pins, other ones influence the serial bootloader, please consult the <a class="reference external" href="https://www.espressif.com/sites/default/files/documentation/esp32-p4_datasheet_en.pdf">ESP32-P4 Datasheet</a>, section “Strapping Pins”.</p>
+</section>
+</section>
+<section id="automatic-bootloader">
+<span id="id1"></span><h2>Automatic Bootloader<a class="headerlink" href="#automatic-bootloader" title="Permalink to this heading"></a></h2>
+<p><code class="docutils literal notranslate"><span class="pre">esptool</span></code> resets ESP32-P4 automatically by asserting <code class="docutils literal notranslate"><span class="pre">DTR</span></code> and <code class="docutils literal notranslate"><span class="pre">RTS</span></code> control lines of the USB to serial converter chip, i.e., FTDI, CP210x, or CH340x. The <code class="docutils literal notranslate"><span class="pre">DTR</span></code> and <code class="docutils literal notranslate"><span class="pre">RTS</span></code> control lines are in turn connected to <code class="docutils literal notranslate"><span class="pre">GPIO35</span></code> and <code class="docutils literal notranslate"><span class="pre">EN</span></code> (<code class="docutils literal notranslate"><span class="pre">CHIP_PU</span></code>) pins of ESP32-P4, thus changes in the voltage levels of <code class="docutils literal notranslate"><span class="pre">DTR</span></code> and <code class="docutils literal notranslate"><span class="pre">RTS</span></code> will boot the ESP32-P4 into Firmware Download mode.</p>
+<div class="admonition note">
+<p class="admonition-title">Note</p>
+<p>When developing <code class="docutils literal notranslate"><span class="pre">esptool</span></code>, keep in mind <code class="docutils literal notranslate"><span class="pre">DTR</span></code> and <code class="docutils literal notranslate"><span class="pre">RTS</span></code> are active low signals, i.e., <code class="docutils literal notranslate"><span class="pre">True</span></code> = pin &#64; 0V, <code class="docutils literal notranslate"><span class="pre">False</span></code> = pin &#64; VCC.</p>
+</div>
+<p>As an example of auto-reset curcuitry implementation, check the <a class="reference external" href="https://dl.espressif.com/dl/schematics/esp32_devkitc_v4-sch-20180607a.pdf">schematic</a> of the ESP32 DevKitC development board:</p>
+<ul class="simple">
+<li><p>The <strong>Micro USB 5V &amp; USB-UART</strong> section shows the <code class="docutils literal notranslate"><span class="pre">DTR</span></code> and <code class="docutils literal notranslate"><span class="pre">RTS</span></code> control lines of the USB to serial converter chip connected to <code class="docutils literal notranslate"><span class="pre">GPIO35</span></code> and <code class="docutils literal notranslate"><span class="pre">EN</span></code> pins of the ESP module.</p></li>
+<li><p>Some OS and/or drivers may activate <code class="docutils literal notranslate"><span class="pre">RTS</span></code> and or <code class="docutils literal notranslate"><span class="pre">DTR</span></code> automatically when opening the serial port (true only for some serial terminal programs, not <code class="docutils literal notranslate"><span class="pre">esptool</span></code>), pulling them low together and holding the ESP in reset. If <code class="docutils literal notranslate"><span class="pre">RTS</span></code> is wired directly to <code class="docutils literal notranslate"><span class="pre">EN</span></code> then RTS/CTS “hardware flow control” needs to be disabled in the serial program to avoid this.
+An additional circuitry is implemented in order to avoid this problem - if both <code class="docutils literal notranslate"><span class="pre">RTS</span></code> and <code class="docutils literal notranslate"><span class="pre">DTR</span></code> are asserted together, this doesn’t reset the chip. The schematic shows this specific circuit with two transistors and its truth table.</p></li>
+<li><p>If this circuitry is implemented (all Espressif boards have it), adding a capacitor between the <code class="docutils literal notranslate"><span class="pre">EN</span></code> pin and <code class="docutils literal notranslate"><span class="pre">GND</span></code> (in the 1uF-10uF range) is necessary for the reset circuitry to work reliably. This is shown in the <strong>ESP32 Module</strong> section of the schematic.</p></li>
+<li><p>The <strong>Switch Button</strong> section shows buttons needed for <a class="reference internal" href="#manual-bootloader"><span class="std std-ref">manually switching to bootloader</span></a>.</p></li>
+</ul>
+<p>Make the following connections for <code class="docutils literal notranslate"><span class="pre">esptool</span></code> to automatically enter the bootloader of an ESP32-P4 chip:</p>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>ESP Pin</p></th>
+<th class="head"><p>Serial Pin</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>EN</p></td>
+<td><p>RTS</p></td>
+</tr>
+<tr class="row-odd"><td><p>GPIO35</p></td>
+<td><p>DTR</p></td>
+</tr>
+</tbody>
+</table>
+<p>In Linux serial ports by default will assert RTS when nothing is attached to them. This can hold the ESP32-P4 in a reset loop which may cause some serial adapters to subsequently reset loop. This functionality can be disabled by disabling <code class="docutils literal notranslate"><span class="pre">HUPCL</span></code> (ie <code class="docutils literal notranslate"><span class="pre">sudo</span> <span class="pre">stty</span> <span class="pre">-F</span> <span class="pre">/dev/ttyUSB0</span> <span class="pre">-hupcl</span></code>).</p>
+<p>(Some third party ESP32-P4 development boards use an automatic reset circuit for <code class="docutils literal notranslate"><span class="pre">EN</span></code> &amp; <code class="docutils literal notranslate"><span class="pre">GPIO35</span></code> pins, but don’t add a capacitor on the <code class="docutils literal notranslate"><span class="pre">EN</span></code> pin. This results in unreliable automatic reset, especially on Windows. Adding a 1uF (or higher) value capacitor between <code class="docutils literal notranslate"><span class="pre">EN</span></code> pin and <code class="docutils literal notranslate"><span class="pre">GND</span></code> may make automatic reset more reliable.)</p>
+<p>In general, you should have no problems with the official Espressif development boards. However, <code class="docutils literal notranslate"><span class="pre">esptool</span></code> is not able to reset your hardware automatically in the following cases:</p>
+<ul class="simple">
+<li><p>Your hardware does not have the <code class="docutils literal notranslate"><span class="pre">DTR</span></code> and <code class="docutils literal notranslate"><span class="pre">RTS</span></code> lines connected to <code class="docutils literal notranslate"><span class="pre">GPIO35</span></code> and <code class="docutils literal notranslate"><span class="pre">EN</span></code> (<code class="docutils literal notranslate"><span class="pre">CHIP_PU</span></code>)</p></li>
+<li><p>The <code class="docutils literal notranslate"><span class="pre">DTR</span></code> and <code class="docutils literal notranslate"><span class="pre">RTS</span></code> lines are configured differently</p></li>
+<li><p>There are no such serial control lines at all</p></li>
+</ul>
+</section>
+<section id="manual-bootloader">
+<span id="id2"></span><h2>Manual Bootloader<a class="headerlink" href="#manual-bootloader" title="Permalink to this heading"></a></h2>
+<p>Depending on the kind of hardware you have, it may also be possible to manually put your ESP32-P4 board into Firmware Download mode (reset).</p>
+<ul class="simple">
+<li><p>For development boards produced by Espressif, this information can be found in the respective getting started guides or user guides. For example, to manually reset a development board, hold down the <strong>Boot</strong> button (<code class="docutils literal notranslate"><span class="pre">GPIO35</span></code>) and press the <strong>EN</strong> button (<code class="docutils literal notranslate"><span class="pre">EN</span></code> (<code class="docutils literal notranslate"><span class="pre">CHIP_PU</span></code>)).</p></li>
+<li><p>For other types of hardware, try pulling <code class="docutils literal notranslate"><span class="pre">GPIO35</span></code> down.</p></li>
+</ul>
+<div class="admonition note">
+<p class="admonition-title">Note</p>
+<p>If esptool is able to reset the chip but for some reason the chip is not entering into bootloader mode then hold down the Boot button (or pull down <code class="docutils literal notranslate"><span class="pre">GPIO35</span></code>) while you start esptool and keep it down during reset.</p>
+</div>
+</section>
+<section id="boot-log">
+<h2>Boot Log<a class="headerlink" href="#boot-log" title="Permalink to this heading"></a></h2>
+<section id="boot-mode-message">
+<h3>Boot Mode Message<a class="headerlink" href="#boot-mode-message" title="Permalink to this heading"></a></h3>
+<p>After reset, the second line printed by the ESP32-P4 ROM (at 115200bps) is a reset &amp; boot mode message:</p>
+<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="n">ets</span> <span class="n">Jun</span> <span class="mi">8</span> <span class="mi">2016</span> <span class="mi">00</span><span class="p">:</span><span class="mi">22</span><span class="p">:</span><span class="mi">57</span>
+<span class="n">rst</span><span class="p">:</span><span class="mh">0x1</span> <span class="p">(</span><span class="n">POWERON_RESET</span><span class="p">),</span><span class="n">boot</span><span class="p">:</span><span class="mh">0x3</span> <span class="p">(</span><span class="n">DOWNLOAD_BOOT</span><span class="p">(</span><span class="n">UART0</span><span class="o">/</span><span class="n">UART1</span><span class="o">/</span><span class="n">SDIO_REI_REO_V2</span><span class="p">))</span>
+</pre></div>
+</div>
+<p><code class="docutils literal notranslate"><span class="pre">rst:0xNN</span> <span class="pre">(REASON)</span></code> is an enumerated value (and description) of the reason for the reset. A mapping between the hex value and each reason can be found in the <a class="reference external" href="https://github.com/espressif/esp-idf/blob/release/v5.2/components/esp_rom/include/esp32p4/rom/rtc.h">ESP-IDF source under RESET_REASON enum</a>.
+The value can be read in ESP32-P4 code via the <a class="reference external" href="https://github.com/espressif/esp-idf/blob/release/v5.2/components/esp_rom/include/esp32p4/rom/rtc.h">get_reset_reason() ROM function</a>.</p>
+<p><code class="docutils literal notranslate"><span class="pre">boot:0xNN</span> <span class="pre">(DESCRIPTION)</span></code> is the hex value of the strapping pins, as represented in the <a class="reference external" href="https://github.com/espressif/esp-idf/blob/release/v5.2/components/soc/esp32p4/include/soc/gpio_reg.h">GPIO_STRAP register</a>.</p>
+<p>The individual bit values are as follows:</p>
+<ul class="simple">
+<li><p><code class="docutils literal notranslate"><span class="pre">0x04</span></code> - GPIO36</p></li>
+<li><p><code class="docutils literal notranslate"><span class="pre">0x08</span></code> - GPIO35</p></li>
+</ul>
+<p>If the pin was high on reset, the bit value will be set. If it was low on reset, the bit will be cleared.</p>
+<p>A number of boot mode strings can be shown depending on which bits are set:</p>
+<ul class="simple">
+<li><p><code class="docutils literal notranslate"><span class="pre">DOWNLOAD_BOOT(UART0/UART1/SDIO_REI_REO_V2)</span></code> or <code class="docutils literal notranslate"><span class="pre">DOWNLOAD(USB/UART0)</span></code> - ESP32-P4 is in download flashing mode (suitable for esptool)</p></li>
+<li><p><code class="docutils literal notranslate"><span class="pre">SPI_FAST_FLASH_BOOT</span></code> - This is the normal SPI flash boot mode.</p></li>
+<li><p>Other modes (including <code class="docutils literal notranslate"><span class="pre">SPI_FLASH_BOOT</span></code>, <code class="docutils literal notranslate"><span class="pre">SDIO_REI_FEO_V1_BOOT</span></code>, <code class="docutils literal notranslate"><span class="pre">ATE_BOOT</span></code>) may be shown here. This indicates an unsupported boot mode has been selected.
+Consult the strapping pins shown above (in most cases, one of these modes is selected if GPIO36 has been pulled high when GPIO35 is low).</p></li>
+</ul>
+</section>
+<section id="later-boot-messages">
+<h3>Later Boot Messages<a class="headerlink" href="#later-boot-messages" title="Permalink to this heading"></a></h3>
+<p>Later output from the ROM bootloader depends on the strapping pins and
+the boot mode. Some common output includes:</p>
+<section id="early-flash-read-error">
+<h4>Early Flash Read Error<a class="headerlink" href="#early-flash-read-error" title="Permalink to this heading"></a></h4>
+<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="n">Invalid</span> <span class="n">header</span> <span class="o">&lt;</span><span class="n">value</span> <span class="n">at</span> <span class="mh">0x2000</span><span class="o">&gt;</span>
+</pre></div>
+</div>
+<p>This fatal error indicates that the bootloader tried to read the software bootloader header at address 0x2000 but failed to read valid data. Possible reasons for this include:</p>
+<p><ul class="simple">
+<li><p>There isn’t actually a bootloader at offset 0x2000 (maybe the bootloader was flashed to the wrong offset by mistake, or the flash has been erased and no bootloader has been flashed yet.)</p></li>
+<li><p>Physical problem with the connection to the flash chip, or flash chip power.</p></li>
+<li><p>Flash encryption is enabled but the bootloader is plaintext. Alternatively, flash encryption is disabled but the bootloader is encrypted ciphertext.</p></li>
+</ul>
+</p>
+</section>
+<section id="software-bootloader-header-info">
+<h4>Software Bootloader Header Info<a class="headerlink" href="#software-bootloader-header-info" title="Permalink to this heading"></a></h4>
+<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="n">SPIWP</span><span class="p">:</span><span class="mh">0xee</span>
+<span class="n">mode</span><span class="p">:</span><span class="n">DIO</span><span class="p">,</span> <span class="n">clock</span> <span class="n">div</span><span class="p">:</span><span class="mi">1</span>
+</pre></div>
+</div>
+<p>This is normal boot output based on a combination of eFuse values and information read from the bootloader header at flash offset 0x2000:</p>
+<p><ul class="simple">
+<li><p><code class="docutils literal notranslate"><span class="pre">SPIWP:0xNN</span></code> indicates a custom <code class="docutils literal notranslate"><span class="pre">WP</span></code> pin value, which is stored in the bootloader header. This pin value is only used if SPI flash pins have been remapped via eFuse (as shown in the <code class="docutils literal notranslate"><span class="pre">configsip</span></code> value).
+All custom pin values but WP are encoded in the configsip byte loaded from eFuse, and WP is supplied in the bootloader header.</p></li>
+<li><p><code class="docutils literal notranslate"><span class="pre">mode:</span> <span class="pre">AAA,</span> <span class="pre">clock</span> <span class="pre">div:</span> <span class="pre">N</span></code>. SPI flash access mode. Read from the bootloader header, correspond to the <code class="docutils literal notranslate"><span class="pre">--flash-mode</span></code> and <code class="docutils literal notranslate"><span class="pre">--flash-freq</span></code> arguments supplied to <code class="docutils literal notranslate"><span class="pre">esptool</span> <span class="pre">write-flash</span></code> or <code class="docutils literal notranslate"><span class="pre">esptool</span> <span class="pre">elf2image</span></code>.</p></li>
+<li><p><code class="docutils literal notranslate"><span class="pre">mode</span></code> can be DIO, DOUT, QIO, or QOUT. <em>QIO and QOUT are not supported here</em>, to boot in a Quad I/O mode the ROM bootloader should load the software bootloader in a Dual I/O mode and then the ESP-IDF software bootloader enables Quad I/O based on the detected flash chip mode.</p></li>
+<li><p><code class="docutils literal notranslate"><span class="pre">clock</span> <span class="pre">div:</span> <span class="pre">N</span></code> is the SPI flash clock frequency divider. This is an integer clock divider value from an 80MHz APB clock, based on the supplied <code class="docutils literal notranslate"><span class="pre">--flash-freq</span></code> argument (ie 80MHz=1, 40MHz=2, etc).
+The ROM bootloader actually loads the software bootloader at a lower frequency than the <code class="docutils literal notranslate"><span class="pre">--flash-freq</span></code> value. The initial APB clock frequency is equal to the crystal frequency, so with a 40MHz crystal the SPI clock used to load the software bootloader will be half the configured value (40MHz/2=20MHz).
+When the software bootloader starts it sets the APB clock to 80MHz causing the SPI clock frequency to match the value set when flashing.</p></li>
+</ul>
+</p>
+</section>
+<section id="software-bootloader-load-segments">
+<h4>Software Bootloader Load Segments<a class="headerlink" href="#software-bootloader-load-segments" title="Permalink to this heading"></a></h4>
+<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="n">load</span><span class="p">:</span><span class="mh">0x3fff0008</span><span class="p">,</span><span class="nb">len</span><span class="p">:</span><span class="mi">8</span>
+<span class="n">load</span><span class="p">:</span><span class="mh">0x3fff0010</span><span class="p">,</span><span class="nb">len</span><span class="p">:</span><span class="mi">3680</span>
+<span class="n">load</span><span class="p">:</span><span class="mh">0x40078000</span><span class="p">,</span><span class="nb">len</span><span class="p">:</span><span class="mi">8364</span>
+<span class="n">load</span><span class="p">:</span><span class="mh">0x40080000</span><span class="p">,</span><span class="nb">len</span><span class="p">:</span><span class="mi">252</span>
+<span class="n">entry</span> <span class="mh">0x40080034</span>
+</pre></div>
+</div>
+<p>These entries are printed as the ROM bootloader loads each segment in the software bootloader image. The load address and length of each segment is printed.</p>
+<p>You can compare these values to the software bootloader image by running <code class="docutils literal notranslate"><span class="pre">esptool</span> <span class="pre">--chip</span> <span class="pre">esp32p4</span> <span class="pre">image-info</span> <span class="pre">/path/to/bootloader.bin</span></code> to dump image info including a summary of each segment. Corresponding details will also be found in the bootloader ELF file headers.</p>
+<p>If there is a problem with the SPI flash chip addressing mode, the values printed by the bootloader here may be corrupted.</p>
+<p>The final line shows the entry point address of the software bootloader, where the ROM bootloader will call as it hands over control.</p>
+</section>
+</section>
+</section>
+</section>
+
+
+ </div>
+ </div>
+ <footer><div class="rst-footer-buttons" role="navigation" aria-label="Footer">
+ <a href="spi-flash-modes.html" class="btn btn-neutral float-left" title="SPI Flash Modes" accesskey="p" rel="prev"><span class="fa fa-arrow-circle-left" aria-hidden="true"></span> Previous</a>
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+
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+ <div role="contentinfo">
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+
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+ <li>
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diff --git a/cpu-docs/espressif-software/esptool_boot-mode-selection_v5.3.1.rst b/cpu-docs/espressif-software/esptool_boot-mode-selection_v5.3.1.rst
new file mode 100644
index 0000000..e514d53
--- /dev/null
+++ b/cpu-docs/espressif-software/esptool_boot-mode-selection_v5.3.1.rst
@@ -0,0 +1,373 @@
+{IDF_TARGET_STRAP_BOOT_GPIO:default="GPIO9", esp8266="GPIO0", esp32="GPIO0", esp32s2="GPIO0", esp32s3="GPIO0", esp32p4="GPIO35", esp32c5="GPIO28", esp32h21="GPIO14", esp32h4="GPIO14"}
+
+{IDF_TARGET_STRAP_BOOT_2_GPIO:default="GPIO8", esp32="GPIO2", esp32s2="GPIO46", esp32s3="GPIO46", esp32p4="GPIO36", esp32c5="GPIO27", esp32h21="GPIO13", esp32h4="GPIO13"}
+
+{IDF_TARGET_BOOTLOADER_OFFSET:default="0x0", esp32="0x1000", esp32s2="0x1000", esp32p4="0x2000", esp32c5="0x2000"}
+
+.. _boot-mode:
+
+Boot Mode Selection
+===================
+
+This guide explains how to select the boot mode correctly and describes the boot log messages of {IDF_TARGET_NAME}.
+
+.. only:: esp8266
+
+ On many development boards with built-in USB/Serial, this is done for you and ``esptool`` can automatically reset the board into bootloader mode. For other configurations, you will need to follow these steps:
+
+ Required Pins
+ -------------
+
+ The following ESP8266 pins must be in a known state for either normal (flash boot) or serial bootloader operation. Most development boards or modules make necessary connections already, internally:
+
+ +--------+--------------------------------------------------------------------------------------------------------------------+
+ | GPIO | State |
+ +========+====================================================================================================================+
+ | 15 | Pulled Low/GND (directly connected to GND, or external pull-down resistor) |
+ +--------+--------------------------------------------------------------------------------------------------------------------+
+ | 2 | Pull-up resistor High/VCC, or No Connection (pin has internal weak pullup, external pullup resistor is optional) |
+ +--------+--------------------------------------------------------------------------------------------------------------------+
+
+ If these pins are set differently to shown, nothing on the ESP8266 will work as expected. See `ESP8266 Pin List document <https://www.espressif.com/en/support/documents/technical-documents?keys=ESP8266+Pin+List>`__ to see what boot modes are enabled for different pin combinations.
+
+ When the ESP8266 goes into serial bootloader mode, the Boot ROM switches GPIO2 to an output and the UART TX signal is also output to this pin. For this reason GPIO2 should not be directly connected to VCC. Similarly, make sure GPIO2 is not connected to another peripheral where this may cause an issue when in download mode.
+
+ Select Bootloader Mode
+ ----------------------
+
+ The ESP8266 will enter the serial bootloader when GPIO0 is held low on reset. Otherwise it will run the program in flash.
+
+ +---------------+----------------------------------------+
+ | GPIO0 Input | Mode |
+ +===============+========================================+
+ | Low/GND | ROM serial bootloader for esptool |
+ +---------------+----------------------------------------+
+ | High/VCC | Normal execution mode |
+ +---------------+----------------------------------------+
+
+ Many configurations use a "Flash" button that pulls GPIO0 low when pressed.
+
+.. only:: not esp8266
+
+ .. warning::
+
+ The {IDF_TARGET_NAME} has a 45k ohm internal pull-up/pull-down resistor at {IDF_TARGET_STRAP_BOOT_GPIO} (and other pins). If you want to connect a switch button to enter the boot mode, this has to be a strong pull-down. For example a 10k resistor to GND.
+
+ Information about {IDF_TARGET_NAME} strapping pins can also be found in the `{IDF_TARGET_NAME} Datasheet <{IDF_TARGET_DATASHEET_EN_URL}>`__, section "Strapping Pins".
+
+ On many development boards with built-in USB/Serial, ``esptool`` can automatically reset the board into bootloader mode. For other configurations or custom hardware, you will need to check the orientation of some "strapping pins" to get the correct boot mode:
+
+ Select Bootloader Mode
+ ----------------------
+
+ {IDF_TARGET_STRAP_BOOT_GPIO}
+ ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+ The {IDF_TARGET_NAME} will enter the serial bootloader when {IDF_TARGET_STRAP_BOOT_GPIO} is held low on reset. Otherwise it will run the program in flash.
+
+ .. list-table::
+ :widths: 10 25
+ :header-rows: 1
+
+ * - {IDF_TARGET_STRAP_BOOT_GPIO} Input
+ - Mode
+ * - Low/GND
+ - ROM serial bootloader for esptool
+ * - High/VCC
+ - Normal execution mode
+
+ {IDF_TARGET_STRAP_BOOT_GPIO} has an internal pullup resistor, so if it is left unconnected then it will pull high.
+
+ Many boards use a button marked "Flash" (or "BOOT" on some Espressif development boards) that pulls {IDF_TARGET_STRAP_BOOT_GPIO} low when pressed.
+
+ {IDF_TARGET_STRAP_BOOT_2_GPIO}
+ ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+ .. only:: esp32 or esp32s2 or esp32s3
+
+ {IDF_TARGET_STRAP_BOOT_2_GPIO} must also be either left unconnected/floating, or driven Low, in order to enter the serial bootloader.
+
+ .. only:: esp32c3 or esp32c2 or esp32h2 or esp32c6 or esp32p4 or esp32c5 or esp32c61 or esp32h21 or esp32h4
+
+ {IDF_TARGET_STRAP_BOOT_2_GPIO} must also be driven High, in order to enter the serial bootloader reliably. The strapping combination of {IDF_TARGET_STRAP_BOOT_2_GPIO} = 0 and {IDF_TARGET_STRAP_BOOT_GPIO} = 0 is invalid and will trigger unexpected behavior.
+
+ In normal boot mode ({IDF_TARGET_STRAP_BOOT_GPIO} high), {IDF_TARGET_STRAP_BOOT_2_GPIO} is ignored.
+
+
+ Other Pins
+ ^^^^^^^^^^
+
+ .. only:: not esp32
+
+ As well as the above mentioned pins, other ones influence the serial bootloader, please consult the `{IDF_TARGET_NAME} Datasheet <{IDF_TARGET_DATASHEET_EN_URL}>`__, section "Strapping Pins".
+
+ .. only:: esp32
+
+ As well as {IDF_TARGET_STRAP_BOOT_GPIO} and {IDF_TARGET_STRAP_BOOT_2_GPIO}, the following pins influence the serial bootloader mode:
+
+ +-------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+ | GPIO | Meaning |
+ +=============+============================================================================================================================================================================================================================================================================================+
+ | 12 (MTDI) | If driven High, flash voltage (VDD_SDIO) is 1.8V not default 3.3V. Has internal pull-down, so unconnected = Low = 3.3V. May prevent flashing and/or booting if 3.3V flash is used and this pin is pulled high, causing the flash to brownout. See the datasheet for more details. |
+ +-------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+ | 15 (MTDO) | If driven Low, silences boot messages printed by the ROM bootloader. Has an internal pull-up, so unconnected = High = normal output. |
+ +-------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+
+ For more information, consult the `{IDF_TARGET_NAME} Datasheet <{IDF_TARGET_DATASHEET_EN_URL}>`__, section "Strapping Pins".
+
+.. _automatic-bootloader:
+
+Automatic Bootloader
+--------------------
+
+``esptool`` resets {IDF_TARGET_NAME} automatically by asserting ``DTR`` and ``RTS`` control lines of the USB to serial converter chip, i.e., FTDI, CP210x, or CH340x. The ``DTR`` and ``RTS`` control lines are in turn connected to ``{IDF_TARGET_STRAP_BOOT_GPIO}`` and ``EN`` (``CHIP_PU``) pins of {IDF_TARGET_NAME}, thus changes in the voltage levels of ``DTR`` and ``RTS`` will boot the {IDF_TARGET_NAME} into Firmware Download mode.
+
+.. note::
+
+ When developing ``esptool``, keep in mind ``DTR`` and ``RTS`` are active low signals, i.e., ``True`` = pin @ 0V, ``False`` = pin @ VCC.
+
+As an example of auto-reset curcuitry implementation, check the `schematic <https://dl.espressif.com/dl/schematics/esp32_devkitc_v4-sch-20180607a.pdf>`_ of the ESP32 DevKitC development board:
+
+- The **Micro USB 5V & USB-UART** section shows the ``DTR`` and ``RTS`` control lines of the USB to serial converter chip connected to ``{IDF_TARGET_STRAP_BOOT_GPIO}`` and ``EN`` pins of the ESP module.
+- Some OS and/or drivers may activate ``RTS`` and or ``DTR`` automatically when opening the serial port (true only for some serial terminal programs, not ``esptool``), pulling them low together and holding the ESP in reset. If ``RTS`` is wired directly to ``EN`` then RTS/CTS "hardware flow control" needs to be disabled in the serial program to avoid this.
+ An additional circuitry is implemented in order to avoid this problem - if both ``RTS`` and ``DTR`` are asserted together, this doesn't reset the chip. The schematic shows this specific circuit with two transistors and its truth table.
+- If this circuitry is implemented (all Espressif boards have it), adding a capacitor between the ``EN`` pin and ``GND`` (in the 1uF-10uF range) is necessary for the reset circuitry to work reliably. This is shown in the **ESP32 Module** section of the schematic.
+- The **Switch Button** section shows buttons needed for :ref:`manually switching to bootloader <manual-bootloader>`.
+
+Make the following connections for ``esptool`` to automatically enter the bootloader of an {IDF_TARGET_NAME} chip:
+
+.. list-table::
+ :header-rows: 1
+
+ * - ESP Pin
+ - Serial Pin
+ * - EN
+ - RTS
+ * - {IDF_TARGET_STRAP_BOOT_GPIO}
+ - DTR
+
+In Linux serial ports by default will assert RTS when nothing is attached to them. This can hold the {IDF_TARGET_NAME} in a reset loop which may cause some serial adapters to subsequently reset loop. This functionality can be disabled by disabling ``HUPCL`` (ie ``sudo stty -F /dev/ttyUSB0 -hupcl``).
+
+(Some third party {IDF_TARGET_NAME} development boards use an automatic reset circuit for ``EN`` & ``{IDF_TARGET_STRAP_BOOT_GPIO}`` pins, but don't add a capacitor on the ``EN`` pin. This results in unreliable automatic reset, especially on Windows. Adding a 1uF (or higher) value capacitor between ``EN`` pin and ``GND`` may make automatic reset more reliable.)
+
+In general, you should have no problems with the official Espressif development boards. However, ``esptool`` is not able to reset your hardware automatically in the following cases:
+
+- Your hardware does not have the ``DTR`` and ``RTS`` lines connected to ``{IDF_TARGET_STRAP_BOOT_GPIO}`` and ``EN`` (``CHIP_PU``)
+- The ``DTR`` and ``RTS`` lines are configured differently
+- There are no such serial control lines at all
+
+.. _manual-bootloader:
+
+Manual Bootloader
+-----------------
+
+Depending on the kind of hardware you have, it may also be possible to manually put your {IDF_TARGET_NAME} board into Firmware Download mode (reset).
+
+- For development boards produced by Espressif, this information can be found in the respective getting started guides or user guides. For example, to manually reset a development board, hold down the **Boot** button (``{IDF_TARGET_STRAP_BOOT_GPIO}``) and press the **EN** button (``EN`` (``CHIP_PU``)).
+- For other types of hardware, try pulling ``{IDF_TARGET_STRAP_BOOT_GPIO}`` down.
+
+.. note::
+
+ If esptool is able to reset the chip but for some reason the chip is not entering into bootloader mode then hold down the Boot button (or pull down ``{IDF_TARGET_STRAP_BOOT_GPIO}``) while you start esptool and keep it down during reset.
+
+.. only:: esp8266
+
+ .. _boot-log-esp8266:
+
+ Boot Log
+ --------
+
+ The ESP8266 boot rom writes a log to the UART when booting. The timing is a little bit unusual: ``74880 baud`` (see :ref:`serial-port-settings`).
+
+ ::
+
+ ets Jan 8 2014,rst cause 1, boot mode:(3,7)
+
+ load 0x40100000, len 24236, room 16
+ tail 12
+ chksum 0xb7
+ ho 0 tail 12 room 4
+ load 0x3ffe8000, len 3008, room 12
+ tail 4
+ chksum 0x2c
+ load 0x3ffe8bc0, len 4816, room 4
+ tail 12
+ chksum 0x46
+ csum 0x46
+
+
+ Explanation
+ ^^^^^^^^^^^
+
+ **rst_cause:**
+
+ +---------------+----------------------------------------+
+ | Value | Meaning |
+ +===============+========================================+
+ | 1 | power-on |
+ +---------------+----------------------------------------+
+ | 2 | external-reset |
+ +---------------+----------------------------------------+
+ | 4 | hardware watchdog-reset |
+ +---------------+----------------------------------------+
+
+
+ **The first parameter of boot_mode:**
+
+ +-------------------------+----------------------------------------------+
+ | Value | Meaning |
+ +=========================+==============================================+
+ | 1 (eg. boot mode:(1,x)) | UART download mode (download FW into Flash) |
+ +-------------------------+----------------------------------------------+
+ | 2 (eg. boot mode:(3,x)) | Boot from flash mode |
+ +-------------------------+----------------------------------------------+
+
+ **chksum:**
+
+ If value of "chksum" == value of "csum", it means flash has been read correctly during booting.
+
+ The rest of boot messages are used internally by Espressif.
+
+.. only:: not esp8266
+
+ Boot Log
+ --------
+
+ Boot Mode Message
+ ^^^^^^^^^^^^^^^^^
+
+ After reset, the second line printed by the {IDF_TARGET_NAME} ROM (at 115200bps) is a reset & boot mode message:
+
+ ::
+
+ ets Jun 8 2016 00:22:57
+ rst:0x1 (POWERON_RESET),boot:0x3 (DOWNLOAD_BOOT(UART0/UART1/SDIO_REI_REO_V2))
+
+
+ ``rst:0xNN (REASON)`` is an enumerated value (and description) of the reason for the reset. A mapping between the hex value and each reason can be found in the `ESP-IDF source under RESET_REASON enum <https://github.com/espressif/esp-idf/blob/release/v5.2/components/esp_rom/include/{IDF_TARGET_PATH_NAME}/rom/rtc.h>`__.
+ The value can be read in {IDF_TARGET_NAME} code via the `get_reset_reason() ROM function <https://github.com/espressif/esp-idf/blob/release/v5.2/components/esp_rom/include/{IDF_TARGET_PATH_NAME}/rom/rtc.h>`__.
+
+ ``boot:0xNN (DESCRIPTION)`` is the hex value of the strapping pins, as represented in the `GPIO_STRAP register <https://github.com/espressif/esp-idf/blob/release/v5.2/components/soc/{IDF_TARGET_PATH_NAME}/include/soc/gpio_reg.h>`__.
+
+ The individual bit values are as follows:
+
+ .. only:: esp32
+
+ - ``0x01`` - GPIO5
+ - ``0x02`` - MTDO (GPIO15)
+ - ``0x04`` - GPIO4
+ - ``0x08`` - GPIO2
+ - ``0x10`` - GPIO0
+ - ``0x20`` - MTDI (GPIO12)
+
+ .. only:: not esp32
+
+ - ``0x04`` - {IDF_TARGET_STRAP_BOOT_2_GPIO}
+ - ``0x08`` - {IDF_TARGET_STRAP_BOOT_GPIO}
+
+ If the pin was high on reset, the bit value will be set. If it was low on reset, the bit will be cleared.
+
+ A number of boot mode strings can be shown depending on which bits are set:
+
+ - ``DOWNLOAD_BOOT(UART0/UART1/SDIO_REI_REO_V2)`` or ``DOWNLOAD(USB/UART0)`` - {IDF_TARGET_NAME} is in download flashing mode (suitable for esptool)
+ - ``SPI_FAST_FLASH_BOOT`` - This is the normal SPI flash boot mode.
+ - Other modes (including ``SPI_FLASH_BOOT``, ``SDIO_REI_FEO_V1_BOOT``, ``ATE_BOOT``) may be shown here. This indicates an unsupported boot mode has been selected.
+ Consult the strapping pins shown above (in most cases, one of these modes is selected if {IDF_TARGET_STRAP_BOOT_2_GPIO} has been pulled high when {IDF_TARGET_STRAP_BOOT_GPIO} is low).
+
+ .. only:: esp32
+
+ .. note::
+
+ ``GPIO_STRAP`` register includes GPIO 4 but this pin is not used by any supported boot mode and be set either high or low for all supported boot modes.
+
+
+ Later Boot Messages
+ ^^^^^^^^^^^^^^^^^^^
+
+ Later output from the ROM bootloader depends on the strapping pins and
+ the boot mode. Some common output includes:
+
+ Early Flash Read Error
+ """"""""""""""""""""""
+
+ .. only:: esp8266
+
+ ::
+
+ flash read err, 0
+
+ .. only:: not esp8266
+
+ ::
+
+ Invalid header <value at {IDF_TARGET_BOOTLOADER_OFFSET}>
+
+ This fatal error indicates that the bootloader tried to read the software bootloader header at address {IDF_TARGET_BOOTLOADER_OFFSET} but failed to read valid data. Possible reasons for this include:
+
+ .. list::
+
+ - There isn't actually a bootloader at offset {IDF_TARGET_BOOTLOADER_OFFSET} (maybe the bootloader was flashed to the wrong offset by mistake, or the flash has been erased and no bootloader has been flashed yet.)
+ - Physical problem with the connection to the flash chip, or flash chip power.
+ - Flash encryption is enabled but the bootloader is plaintext. Alternatively, flash encryption is disabled but the bootloader is encrypted ciphertext.
+
+ :esp32: - Boot mode accidentally set to ``HSPI_FLASH_BOOT``, which uses different SPI flash pins. Check {IDF_TARGET_STRAP_BOOT_2_GPIO} (see above).
+ :esp32: - VDDSDIO has been enabled at 1.8V (due to MTDI/GPIO12, see above), but this flash chip requires 3.3V so it's browning out.
+
+
+ Software Bootloader Header Info
+ """""""""""""""""""""""""""""""
+
+ .. only:: esp32
+
+ ::
+
+ configsip: 0, SPIWP:0x00
+ clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
+ mode:DIO, clock div:1
+
+
+ .. only:: not esp32
+
+ ::
+
+ SPIWP:0xee
+ mode:DIO, clock div:1
+
+
+ This is normal boot output based on a combination of eFuse values and information read from the bootloader header at flash offset {IDF_TARGET_BOOTLOADER_OFFSET}:
+
+ .. list::
+
+ :esp32: - ``configsip: N`` indicates SPI flash config:
+
+ :esp32: - 0 for default SPI flash
+ :esp32: - 1 if booting from the HSPI bus (due to eFuse configuration)
+ :esp32: - Any other value indicates that SPI flash pins have been remapped via eFuse (the value is the value read from eFuse, consult :ref:`espefuse docs <espefuse>` to get an easier to read representation of these pin mappings).
+
+ - ``SPIWP:0xNN`` indicates a custom ``WP`` pin value, which is stored in the bootloader header. This pin value is only used if SPI flash pins have been remapped via eFuse (as shown in the ``configsip`` value).
+ All custom pin values but WP are encoded in the configsip byte loaded from eFuse, and WP is supplied in the bootloader header.
+ :esp32: - ``clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00`` Custom GPIO drive strength values for SPI flash pins. These are read from the bootloader header in flash. Not currently supported.
+ - ``mode: AAA, clock div: N``. SPI flash access mode. Read from the bootloader header, correspond to the ``--flash-mode`` and ``--flash-freq`` arguments supplied to ``esptool write-flash`` or ``esptool elf2image``.
+ - ``mode`` can be DIO, DOUT, QIO, or QOUT. *QIO and QOUT are not supported here*, to boot in a Quad I/O mode the ROM bootloader should load the software bootloader in a Dual I/O mode and then the ESP-IDF software bootloader enables Quad I/O based on the detected flash chip mode.
+ - ``clock div: N`` is the SPI flash clock frequency divider. This is an integer clock divider value from an 80MHz APB clock, based on the supplied ``--flash-freq`` argument (ie 80MHz=1, 40MHz=2, etc).
+ The ROM bootloader actually loads the software bootloader at a lower frequency than the ``--flash-freq`` value. The initial APB clock frequency is equal to the crystal frequency, so with a 40MHz crystal the SPI clock used to load the software bootloader will be half the configured value (40MHz/2=20MHz).
+ When the software bootloader starts it sets the APB clock to 80MHz causing the SPI clock frequency to match the value set when flashing.
+
+ Software Bootloader Load Segments
+ """""""""""""""""""""""""""""""""
+
+ ::
+
+ load:0x3fff0008,len:8
+ load:0x3fff0010,len:3680
+ load:0x40078000,len:8364
+ load:0x40080000,len:252
+ entry 0x40080034
+
+ These entries are printed as the ROM bootloader loads each segment in the software bootloader image. The load address and length of each segment is printed.
+
+ You can compare these values to the software bootloader image by running ``esptool --chip {IDF_TARGET_PATH_NAME} image-info /path/to/bootloader.bin`` to dump image info including a summary of each segment. Corresponding details will also be found in the bootloader ELF file headers.
+
+ If there is a problem with the SPI flash chip addressing mode, the values printed by the bootloader here may be corrupted.
+
+ The final line shows the entry point address of the software bootloader, where the ROM bootloader will call as it hands over control.
diff --git a/cpu-docs/espressif-software/esptool_firmware-image-format_esp32p4_v5.3.1.html b/cpu-docs/espressif-software/esptool_firmware-image-format_esp32p4_v5.3.1.html
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--- /dev/null
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+<li class="toctree-l2 current"><a class="current reference internal" href="#">Firmware Image Format</a><ul>
+<li class="toctree-l3"><a class="reference internal" href="#file-header">File Header</a></li>
+<li class="toctree-l3"><a class="reference internal" href="#extended-file-header">Extended File Header</a></li>
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+ <section id="firmware-image-format">
+<span id="image-format"></span><h1>Firmware Image Format<a class="headerlink" href="#firmware-image-format" title="Permalink to this heading"></a></h1>
+<p>This is technical documentation for the firmware image format used by the ROM bootloader. These are the images created by <code class="docutils literal notranslate"><span class="pre">esptool</span> <span class="pre">elf2image</span></code>.</p>
+<figure class="align-center" id="id1">
+<div><img height="320" src="../_images/packetdiag-42b115aba712a6574ed718ca9d74eb4fd1142025.png" width="928" /></div><figcaption>
+<p><span class="caption-text">Firmware image format</span><a class="headerlink" href="#id1" title="Permalink to this image"></a></p>
+</figcaption>
+</figure>
+<p>The firmware file consists of a header, an extended header, a variable number of data segments and a footer. Multi-byte fields are little-endian.</p>
+<section id="file-header">
+<h2>File Header<a class="headerlink" href="#file-header" title="Permalink to this heading"></a></h2>
+<figure class="align-center" id="id2">
+<div><img height="170" src="../_images/packetdiag-1f7336eac0eac9530b7dd0073def52e90038c424.png" width="928" /></div><figcaption>
+<p><span class="caption-text">Firmware image header</span><a class="headerlink" href="#id2" title="Permalink to this image"></a></p>
+</figcaption>
+</figure>
+<p>The image header is 8 bytes long:</p>
+<table class="docutils align-default">
+<colgroup>
+<col style="width: 15.0%" />
+<col style="width: 85.0%" />
+</colgroup>
+<thead>
+<tr class="row-odd"><th class="head"><p>Byte</p></th>
+<th class="head"><p>Description</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>0</p></td>
+<td><p>Magic number (always <code class="docutils literal notranslate"><span class="pre">0xE9</span></code>)</p></td>
+</tr>
+<tr class="row-odd"><td><p>1</p></td>
+<td><p>Number of segments</p></td>
+</tr>
+<tr class="row-even"><td><p>2</p></td>
+<td><p>SPI Flash Mode (<code class="docutils literal notranslate"><span class="pre">0</span></code> = QIO, <code class="docutils literal notranslate"><span class="pre">1</span></code> = QOUT, <code class="docutils literal notranslate"><span class="pre">2</span></code> = DIO, <code class="docutils literal notranslate"><span class="pre">3</span></code> = DOUT)</p></td>
+</tr>
+<tr class="row-odd"><td><p>3</p></td>
+<td><p>High four bits - Flash size (<code class="docutils literal notranslate"><span class="pre">0</span></code> = 1MB, <code class="docutils literal notranslate"><span class="pre">1</span></code> = 2MB, <code class="docutils literal notranslate"><span class="pre">2</span></code> = 4MB, <code class="docutils literal notranslate"><span class="pre">3</span></code> = 8MB, <code class="docutils literal notranslate"><span class="pre">4</span></code> = 16MB, <code class="docutils literal notranslate"><span class="pre">5</span></code> = 32MB, <code class="docutils literal notranslate"><span class="pre">6</span></code> = 64MB)</p>
+<p>Low four bits - Flash frequency (<code class="docutils literal notranslate"><span class="pre">0</span></code> = 40MHz, <code class="docutils literal notranslate"><span class="pre">1</span></code> = 26MHz, <code class="docutils literal notranslate"><span class="pre">2</span></code> = 20MHz, <code class="docutils literal notranslate"><span class="pre">0xf</span></code> = 80MHz)</p>
+</td>
+</tr>
+<tr class="row-even"><td><p>4-7</p></td>
+<td><p>Entry point address</p></td>
+</tr>
+</tbody>
+</table>
+<p><code class="docutils literal notranslate"><span class="pre">esptool</span></code> overrides the 2nd and 3rd (counted from 0) bytes according to the SPI flash info provided through the command line options (see <a class="reference internal" href="../esptool/flash-modes.html#flash-modes"><span class="std std-ref">Flash Modes</span></a>).
+These bytes are only overridden if this is a bootloader image (an image written to a correct bootloader offset of 0x2000).
+In this case, the appended SHA256 digest, which is a cryptographic hash used to verify the integrity of the image, is also updated to reflect the header changes.
+Generating images without SHA256 digest can be achieved by running <code class="docutils literal notranslate"><span class="pre">esptool</span> <span class="pre">elf2image</span></code> with the <code class="docutils literal notranslate"><span class="pre">--dont-append-digest</span></code> argument.</p>
+</section>
+<section id="extended-file-header">
+<h2>Extended File Header<a class="headerlink" href="#extended-file-header" title="Permalink to this heading"></a></h2>
+<figure class="align-center" id="id3">
+<div><img height="170" src="../_images/packetdiag-027e6c21fd476653802b64490edef0a0e57462d2.png" width="928" /></div><figcaption>
+<p><span class="caption-text">Extended File Header</span><a class="headerlink" href="#id3" title="Permalink to this image"></a></p>
+</figcaption>
+</figure>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Byte</p></th>
+<th class="head"><p>Description</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>0</p></td>
+<td><p>WP pin when SPI pins set via eFuse (read by ROM bootloader)</p></td>
+</tr>
+<tr class="row-odd"><td><p>1-3</p></td>
+<td><p>Drive settings for the SPI flash pins (read by ROM bootloader)</p></td>
+</tr>
+<tr class="row-even"><td><p>4-5</p></td>
+<td><p>Chip ID (which ESP device is this image for)</p></td>
+</tr>
+<tr class="row-odd"><td><p>6</p></td>
+<td><p>Minimal chip revision supported by the image (deprecated, use the following field)</p></td>
+</tr>
+<tr class="row-even"><td><p>7-8</p></td>
+<td><p>Minimal chip revision supported by the image (in format: major * 100 + minor)</p></td>
+</tr>
+<tr class="row-odd"><td><p>9-10</p></td>
+<td><p>Maximal chip revision supported by the image (in format: major * 100 + minor)</p></td>
+</tr>
+<tr class="row-even"><td><p>11-14</p></td>
+<td><p>Reserved bytes in additional header space, currently unused</p></td>
+</tr>
+<tr class="row-odd"><td><p>15</p></td>
+<td><p>Hash appended (If 1, SHA256 digest is appended after the checksum)</p></td>
+</tr>
+</tbody>
+</table>
+</section>
+<section id="segment">
+<h2>Segment<a class="headerlink" href="#segment" title="Permalink to this heading"></a></h2>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Byte</p></th>
+<th class="head"><p>Description</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>0-3</p></td>
+<td><p>Memory offset</p></td>
+</tr>
+<tr class="row-odd"><td><p>4-7</p></td>
+<td><p>Segment size</p></td>
+</tr>
+<tr class="row-even"><td><p>8…n</p></td>
+<td><p>Data</p></td>
+</tr>
+</tbody>
+</table>
+</section>
+<section id="footer">
+<h2>Footer<a class="headerlink" href="#footer" title="Permalink to this heading"></a></h2>
+<p>The file is padded with zeros until its size is one byte less than a multiple of 16 bytes. A last byte (thus making the file size a multiple of 16) is the checksum of the data of all segments. The checksum is defined as the xor-sum of all bytes and the byte <code class="docutils literal notranslate"><span class="pre">0xEF</span></code>.</p>
+<p>If <code class="docutils literal notranslate"><span class="pre">hash</span> <span class="pre">appended</span></code> in the extended file header is <code class="docutils literal notranslate"><span class="pre">0x01</span></code>, a SHA256 digest “simple hash” (of the entire image) is appended after the checksum. This digest is separate to secure boot and only used for detecting corruption. The SPI flash info cannot be changed during flashing if hash is appended after the image.</p>
+<p>If secure boot is enabled, a signature is also appended (and the simple hash is included in the signed data). This image signature is <a class="reference external" href="https://docs.espressif.com/projects/esp-idf/en/latest/esp32/security/secure-boot-v1.html#image-signing-algorithm">Secure Boot V1</a> and <a class="reference external" href="https://docs.espressif.com/projects/esp-idf/en/latest/esp32/security/secure-boot-v2.html#signature-block-format">Secure Boot V2</a> specific.</p>
+</section>
+<section id="analyzing-a-binary-image">
+<h2>Analyzing a Binary Image<a class="headerlink" href="#analyzing-a-binary-image" title="Permalink to this heading"></a></h2>
+<p>To analyze a binary image and get a complete summary of its headers and segments, use the <a class="reference internal" href="../esptool/basic-commands.html#image-info"><span class="std std-ref">image-info</span></a> command.</p>
+</section>
+</section>
+
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diff --git a/cpu-docs/espressif-software/esptool_firmware-image-format_v5.3.1.rst b/cpu-docs/espressif-software/esptool_firmware-image-format_v5.3.1.rst
new file mode 100644
index 0000000..61d35f1
--- /dev/null
+++ b/cpu-docs/espressif-software/esptool_firmware-image-format_v5.3.1.rst
@@ -0,0 +1,209 @@
+{IDF_TARGET_FLASH_FREQ_F:default="80", esp32c2="60", esp32h2="48", esp32h21="48", esp32h4="48"}
+
+{IDF_TARGET_FLASH_FREQ_0:default="40", esp32c2="30", esp32h2="24", esp32h21="24", esp32h4="24"}
+
+{IDF_TARGET_FLASH_FREQ_1:default="26", esp32c2="20", esp32h2="16", esp32h21="16", esp32h4="16"}
+
+{IDF_TARGET_FLASH_FREQ_2:default="20", esp32c2="15", esp32h2="12", esp32h21="12", esp32h4="12"}
+
+{IDF_TARGET_BOOTLOADER_OFFSET:default="0x0", esp32="0x1000", esp32s2="0x1000", esp32p4="0x2000", esp32c5="0x2000"}
+
+
+.. _image-format:
+
+Firmware Image Format
+=====================
+
+This is technical documentation for the firmware image format used by the ROM bootloader. These are the images created by ``esptool elf2image``.
+
+.. only:: esp8266
+
+ .. packetdiag:: diag/firmware_image_format_esp8266.diag
+ :caption: Firmware image format
+ :align: center
+
+ The firmware file consists of a header, a variable number of data segments and a footer. Multi-byte fields are little-endian.
+
+.. only:: not esp8266
+
+ .. packetdiag:: diag/firmware_image_format.diag
+ :caption: Firmware image format
+ :align: center
+
+ The firmware file consists of a header, an extended header, a variable number of data segments and a footer. Multi-byte fields are little-endian.
+
+File Header
+-----------
+
+.. packetdiag:: diag/firmware_image_header_format.diag
+ :caption: Firmware image header
+ :align: center
+
+The image header is 8 bytes long:
+
+.. only:: esp8266
+
+ +--------+--------------------------------------------------------------------------------------------------+
+ | Byte | Description |
+ +========+==================================================================================================+
+ | 0 | Magic number (always ``0xE9``) |
+ +--------+--------------------------------------------------------------------------------------------------+
+ | 1 | Number of segments |
+ +--------+--------------------------------------------------------------------------------------------------+
+ | 2 | SPI Flash Mode (``0`` = QIO, ``1`` = QOUT, ``2`` = DIO, ``3`` = DOUT) |
+ +--------+--------------------------------------------------------------------------------------------------+
+ | 3 | High four bits - Flash size (``0`` = 512KB, ``1`` = 256KB, ``2`` = 1MB, ``3`` = 2MB, ``4`` = 4MB,|
+ | | ``5`` = 2MB-c1, ``6`` = 4MB-c1, ``8`` = 8MB, ``9`` = 16MB) |
+ | | |
+ | | Low four bits - Flash frequency (``0`` = 40MHz, ``1`` = 26MHz, ``2`` = 20MHz, ``0xf`` = 80MHz) |
+ +--------+--------------------------------------------------------------------------------------------------+
+ | 4-7 | Entry point address |
+ +--------+--------------------------------------------------------------------------------------------------+
+
+
+.. only:: esp32s2 or esp32s3 or esp32p4
+
+ +--------+------------------------------------------------------------------------------------------------+
+ | Byte | Description |
+ +========+================================================================================================+
+ | 0 | Magic number (always ``0xE9``) |
+ +--------+------------------------------------------------------------------------------------------------+
+ | 1 | Number of segments |
+ +--------+------------------------------------------------------------------------------------------------+
+ | 2 | SPI Flash Mode (``0`` = QIO, ``1`` = QOUT, ``2`` = DIO, ``3`` = DOUT) |
+ +--------+------------------------------------------------------------------------------------------------+
+ | 3 | High four bits - Flash size (``0`` = 1MB, ``1`` = 2MB, ``2`` = 4MB, ``3`` = 8MB, ``4`` = 16MB, |
+ | | ``5`` = 32MB, ``6`` = 64MB, ``7`` = 128MB") |
+ | | |
+ | | Low four bits - Flash frequency (``0`` = {IDF_TARGET_FLASH_FREQ_0}MHz, ``1`` = {IDF_TARGET_FLASH_FREQ_1}MHz, ``2`` = {IDF_TARGET_FLASH_FREQ_2}MHz, ``0xf`` = {IDF_TARGET_FLASH_FREQ_F}MHz) |
+ +--------+------------------------------------------------------------------------------------------------+
+ | 4-7 | Entry point address |
+ +--------+------------------------------------------------------------------------------------------------+
+
+
+.. only:: esp32c6
+
+ +--------+------------------------------------------------------------------------------------------------+
+ | Byte | Description |
+ +========+================================================================================================+
+ | 0 | Magic number (always ``0xE9``) |
+ +--------+------------------------------------------------------------------------------------------------+
+ | 1 | Number of segments |
+ +--------+------------------------------------------------------------------------------------------------+
+ | 2 | SPI Flash Mode (``0`` = QIO, ``1`` = QOUT, ``2`` = DIO, ``3`` = DOUT) |
+ +--------+------------------------------------------------------------------------------------------------+
+ | 3 | High four bits - Flash size (``0`` = 1MB, ``1`` = 2MB, ``2`` = 4MB, ``3`` = 8MB, ``4`` = 16MB) |
+ | | |
+ | | Low four bits - Flash frequency (``0`` = 80MHz or 40MHz, ``2`` = 20MHz) |
+ +--------+------------------------------------------------------------------------------------------------+
+ | 4-7 | Entry point address |
+ +--------+------------------------------------------------------------------------------------------------+
+
+ .. note::
+ Flash frequency with value ``0`` can mean either 80MHz or 40MHz based on MSPI clock source mode.
+
+
+.. only:: esp32c5 or esp32c61 or esp32h21 or esp32h4
+
+ +--------+------------------------------------------------------------------------------------------------+
+ | Byte | Description |
+ +========+================================================================================================+
+ | 0 | Magic number (always ``0xE9``) |
+ +--------+------------------------------------------------------------------------------------------------+
+ | 1 | Number of segments |
+ +--------+------------------------------------------------------------------------------------------------+
+ | 2 | SPI Flash Mode (``0`` = QIO, ``1`` = QOUT, ``2`` = DIO, ``3`` = DOUT) |
+ +--------+------------------------------------------------------------------------------------------------+
+ | 3 | High four bits - Flash size (``0`` = 1MB, ``1`` = 2MB, ``2`` = 4MB, ``3`` = 8MB, ``4`` = 16MB) |
+ | | |
+ | | Low four bits - Flash frequency (``0xf`` = {IDF_TARGET_FLASH_FREQ_F}MHz, ``0`` = {IDF_TARGET_FLASH_FREQ_0}MHz, ``2`` = {IDF_TARGET_FLASH_FREQ_2}MHz) |
+ +--------+------------------------------------------------------------------------------------------------+
+ | 4-7 | Entry point address |
+ +--------+------------------------------------------------------------------------------------------------+
+
+.. only:: not (esp8266 or esp32c6 or esp32s3 or esp32s2 or esp32p4 or esp32c5 or esp32c61 or esp32h21 or esp32h4)
+
+ +--------+------------------------------------------------------------------------------------------------+
+ | Byte | Description |
+ +========+================================================================================================+
+ | 0 | Magic number (always ``0xE9``) |
+ +--------+------------------------------------------------------------------------------------------------+
+ | 1 | Number of segments |
+ +--------+------------------------------------------------------------------------------------------------+
+ | 2 | SPI Flash Mode (``0`` = QIO, ``1`` = QOUT, ``2`` = DIO, ``3`` = DOUT) |
+ +--------+------------------------------------------------------------------------------------------------+
+ | 3 | High four bits - Flash size (``0`` = 1MB, ``1`` = 2MB, ``2`` = 4MB, ``3`` = 8MB, ``4`` = 16MB) |
+ | | |
+ | | Low four bits - Flash frequency (``0`` = {IDF_TARGET_FLASH_FREQ_0}MHz, ``1`` = {IDF_TARGET_FLASH_FREQ_1}MHz, ``2`` = {IDF_TARGET_FLASH_FREQ_2}MHz, ``0xf`` = {IDF_TARGET_FLASH_FREQ_F}MHz) |
+ +--------+------------------------------------------------------------------------------------------------+
+ | 4-7 | Entry point address |
+ +--------+------------------------------------------------------------------------------------------------+
+
+
+``esptool`` overrides the 2nd and 3rd (counted from 0) bytes according to the SPI flash info provided through the command line options (see :ref:`flash-modes`).
+These bytes are only overridden if this is a bootloader image (an image written to a correct bootloader offset of {IDF_TARGET_BOOTLOADER_OFFSET}).
+In this case, the appended SHA256 digest, which is a cryptographic hash used to verify the integrity of the image, is also updated to reflect the header changes.
+Generating images without SHA256 digest can be achieved by running ``esptool elf2image`` with the ``--dont-append-digest`` argument.
+
+.. only:: esp8266
+
+ Individual segments come right after this header.
+
+.. only:: not esp8266
+
+ Extended File Header
+ --------------------
+
+ .. packetdiag:: diag/firmware_image_ext_header_format.diag
+ :caption: Extended File Header
+ :align: center
+
+ +--------+---------------------------------------------------------------------------------------------------------+
+ | Byte | Description |
+ +========+=========================================================================================================+
+ | 0 | WP pin when SPI pins set via eFuse (read by ROM bootloader) |
+ +--------+---------------------------------------------------------------------------------------------------------+
+ | 1-3 | Drive settings for the SPI flash pins (read by ROM bootloader) |
+ +--------+---------------------------------------------------------------------------------------------------------+
+ | 4-5 | Chip ID (which ESP device is this image for) |
+ +--------+---------------------------------------------------------------------------------------------------------+
+ | 6 | Minimal chip revision supported by the image (deprecated, use the following field) |
+ +--------+---------------------------------------------------------------------------------------------------------+
+ | 7-8 | Minimal chip revision supported by the image (in format: major * 100 + minor) |
+ +--------+---------------------------------------------------------------------------------------------------------+
+ | 9-10 | Maximal chip revision supported by the image (in format: major * 100 + minor) |
+ +--------+---------------------------------------------------------------------------------------------------------+
+ | 11-14 | Reserved bytes in additional header space, currently unused |
+ +--------+---------------------------------------------------------------------------------------------------------+
+ | 15 | Hash appended (If 1, SHA256 digest is appended after the checksum) |
+ +--------+---------------------------------------------------------------------------------------------------------+
+
+Segment
+-------
+
++---------+-----------------+
+| Byte | Description |
++=========+=================+
+| 0-3 | Memory offset |
++---------+-----------------+
+| 4-7 | Segment size |
++---------+-----------------+
+| 8...n | Data |
++---------+-----------------+
+
+Footer
+------
+
+The file is padded with zeros until its size is one byte less than a multiple of 16 bytes. A last byte (thus making the file size a multiple of 16) is the checksum of the data of all segments. The checksum is defined as the xor-sum of all bytes and the byte ``0xEF``.
+
+.. only:: not esp8266
+
+ If ``hash appended`` in the extended file header is ``0x01``, a SHA256 digest “simple hash” (of the entire image) is appended after the checksum. This digest is separate to secure boot and only used for detecting corruption. The SPI flash info cannot be changed during flashing if hash is appended after the image.
+
+ If secure boot is enabled, a signature is also appended (and the simple hash is included in the signed data). This image signature is `Secure Boot V1 <https://docs.espressif.com/projects/esp-idf/en/latest/esp32/security/secure-boot-v1.html#image-signing-algorithm>`_ and `Secure Boot V2 <https://docs.espressif.com/projects/esp-idf/en/latest/esp32/security/secure-boot-v2.html#signature-block-format>`_ specific.
+
+
+Analyzing a Binary Image
+------------------------
+
+To analyze a binary image and get a complete summary of its headers and segments, use the :ref:`image-info <image-info>` command.
diff --git a/cpu-docs/espressif-software/esptool_serial-protocol_esp32p4_v5.3.1.html b/cpu-docs/espressif-software/esptool_serial-protocol_esp32p4_v5.3.1.html
new file mode 100644
index 0000000..b5a0108
--- /dev/null
+++ b/cpu-docs/espressif-software/esptool_serial-protocol_esp32p4_v5.3.1.html
@@ -0,0 +1,795 @@
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+<li class="toctree-l1 current"><a class="reference internal" href="index.html">Advanced Topics</a><ul class="current">
+<li class="toctree-l2"><a class="reference internal" href="firmware-image-format.html">Firmware Image Format</a></li>
+<li class="toctree-l2 current"><a class="current reference internal" href="#">Serial Protocol</a><ul>
+<li class="toctree-l3"><a class="reference internal" href="#packet-description">Packet Description</a><ul>
+<li class="toctree-l4"><a class="reference internal" href="#low-level-protocol">Low Level Protocol</a></li>
+<li class="toctree-l4"><a class="reference internal" href="#command-packet">Command Packet</a></li>
+<li class="toctree-l4"><a class="reference internal" href="#response-packet">Response Packet</a></li>
+<li class="toctree-l4"><a class="reference internal" href="#commands">Commands</a></li>
+<li class="toctree-l4"><a class="reference internal" href="#checksum">Checksum</a></li>
+</ul>
+</li>
+<li class="toctree-l3"><a class="reference internal" href="#functional-description">Functional Description</a><ul>
+<li class="toctree-l4"><a class="reference internal" href="#initialization">Initialization</a></li>
+<li class="toctree-l4"><a class="reference internal" href="#initialization-chip-type-detection">Initialization - Chip Type Detection</a></li>
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+<li class="toctree-l4"><a class="reference internal" href="#spi-configuration-commands">SPI Configuration Commands</a></li>
+<li class="toctree-l4"><a class="reference internal" href="#bit-read-write">32-Bit Read/Write</a></li>
+<li class="toctree-l4"><a class="reference internal" href="#reading-flash">Reading Flash</a></li>
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+
+ <section id="serial-protocol">
+<span id="id1"></span><h1>Serial Protocol<a class="headerlink" href="#serial-protocol" title="Permalink to this heading"></a></h1>
+<p>This is technical documentation for the serial protocol used by the UART bootloader in the ESP32-P4 ROM and the esptool <a class="reference internal" href="../esptool/flasher-stub.html#stub"><span class="std std-ref">stub loader</span></a> program.</p>
+<p>The UART bootloader runs on chip reset if certain strapping pins are set. See <a class="reference internal" href="../esptool/entering-bootloader.html#entering-the-bootloader"><span class="std std-ref">Entering the Bootloader</span></a> for details of this process.</p>
+<p>By default, esptool uploads a stub “software loader” to the IRAM of the chip. The stub loader then replaces the ROM loader for all future interactions. This standardizes much of the behavior. Pass <code class="docutils literal notranslate"><span class="pre">--no-stub</span></code> to esptool in order to disable the stub loader. See <a class="reference internal" href="../esptool/flasher-stub.html#stub"><span class="std std-ref">Flasher Stub</span></a> for more information.</p>
+<div class="admonition note">
+<p class="admonition-title">Note</p>
+<p>There are differences in the serial protocol between ESP chips! To switch to documentation for a different chip, choose the desired target from the dropdown menu in the upper left corner.</p>
+</div>
+<section id="packet-description">
+<h2>Packet Description<a class="headerlink" href="#packet-description" title="Permalink to this heading"></a></h2>
+<p>The host computer sends a SLIP encoded command request to the ESP chip. The ESP chip responds to the request with a SLIP encoded response packet, including status information and any data as a payload.</p>
+<section id="low-level-protocol">
+<span id="id2"></span><h3>Low Level Protocol<a class="headerlink" href="#low-level-protocol" title="Permalink to this heading"></a></h3>
+<p>The bootloader protocol uses <a class="reference external" href="https://en.wikipedia.org/wiki/Serial_Line_Internet_Protocol">SLIP</a> packet framing for data transmissions in both directions.</p>
+<p>Each SLIP packet begins and ends with <code class="docutils literal notranslate"><span class="pre">0xC0</span></code>. Within the packet, all occurrences of <code class="docutils literal notranslate"><span class="pre">0xC0</span></code> and <code class="docutils literal notranslate"><span class="pre">0xDB</span></code> are replaced with <code class="docutils literal notranslate"><span class="pre">0xDB</span> <span class="pre">0xDC</span></code> and <code class="docutils literal notranslate"><span class="pre">0xDB</span> <span class="pre">0xDD</span></code>, respectively. The replacing is to be done <strong>after</strong> the checksum and lengths are calculated, so the packet length may be longer than the <code class="docutils literal notranslate"><span class="pre">size</span></code> field below.</p>
+</section>
+<section id="command-packet">
+<h3>Command Packet<a class="headerlink" href="#command-packet" title="Permalink to this heading"></a></h3>
+<p>Each command is a SLIP packet initiated by the host and results in a response packet. Inside the packet, the packet consists of a header and a variable-length body. All multi-byte fields are little-endian.</p>
+<figure class="align-center" id="id3">
+<div><img height="220" src="../_images/packetdiag-2b26411142ad479e9f6469f32c1e2f5f2ce1f1f0.png" width="928" /></div><figcaption>
+<p><span class="caption-text">Command packet format</span><a class="headerlink" href="#id3" title="Permalink to this image"></a></p>
+</figcaption>
+</figure>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Byte</p></th>
+<th class="head"><p>Name</p></th>
+<th class="head"><p>Comment</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>0</p></td>
+<td><p>Direction</p></td>
+<td><p>Always <code class="docutils literal notranslate"><span class="pre">0x00</span></code> for requests</p></td>
+</tr>
+<tr class="row-odd"><td><p>1</p></td>
+<td><p>Command</p></td>
+<td><p>Command identifier (see <a class="reference internal" href="#commands">Commands</a>).</p></td>
+</tr>
+<tr class="row-even"><td><p>2-3</p></td>
+<td><p>Size</p></td>
+<td><p>Length of Data field, in bytes.</p></td>
+</tr>
+<tr class="row-odd"><td><p>4-7</p></td>
+<td><p>Checksum</p></td>
+<td><p>Simple checksum of part of the data field (only used for some commands, see <a class="reference internal" href="#checksum">Checksum</a>).</p></td>
+</tr>
+<tr class="row-even"><td><p>8..n</p></td>
+<td><p>Data</p></td>
+<td><p>Variable length data payload (0-65535 bytes, as indicated by Size parameter). Usage depends on specific command.</p></td>
+</tr>
+</tbody>
+</table>
+</section>
+<section id="response-packet">
+<h3>Response Packet<a class="headerlink" href="#response-packet" title="Permalink to this heading"></a></h3>
+<p>Each received command will result in a response SLIP packet sent from the ESP chip to the host. Contents of the response packet is:</p>
+<figure class="align-center" id="id4">
+<div><img height="220" src="../_images/packetdiag-1457843f5c1dc3f306a1c8e876eb44074a071e0a.png" width="928" /></div><figcaption>
+<p><span class="caption-text">Command packet format</span><a class="headerlink" href="#id4" title="Permalink to this image"></a></p>
+</figcaption>
+</figure>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Byte</p></th>
+<th class="head"><p>Name</p></th>
+<th class="head"><p>Comment</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>0</p></td>
+<td><p>Direction</p></td>
+<td><p>Always <code class="docutils literal notranslate"><span class="pre">0x01</span></code> for responses</p></td>
+</tr>
+<tr class="row-odd"><td><p>1</p></td>
+<td><p>Command</p></td>
+<td><p>Same value as Command identifier in the request packet that triggered the response</p></td>
+</tr>
+<tr class="row-even"><td><p>2-3</p></td>
+<td><p>Size</p></td>
+<td><p>Size of data field. At least the length of the <a class="reference internal" href="#status-bytes">Status Bytes</a> (2 or 4 bytes, see below).</p></td>
+</tr>
+<tr class="row-odd"><td><p>4-7</p></td>
+<td><p>Value</p></td>
+<td><p>Response value used by READ_REG command (see below). Zero otherwise.</p></td>
+</tr>
+<tr class="row-even"><td><p>8..n</p></td>
+<td><p>Data</p></td>
+<td><p>Variable length data payload. Length indicated by “Size” field.</p></td>
+</tr>
+</tbody>
+</table>
+<section id="status-bytes">
+<h4>Status Bytes<a class="headerlink" href="#status-bytes" title="Permalink to this heading"></a></h4>
+<p>The final bytes of the Data payload indicate command status:</p>
+<p>For stub loader the final two bytes indicate status (most commands return at least a two byte Data payload):</p>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Byte</p></th>
+<th class="head"><p>Name</p></th>
+<th class="head"><p>Comment</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>Size-2</p></td>
+<td><p>Status</p></td>
+<td><p>Status flag, success (<code class="docutils literal notranslate"><span class="pre">0</span></code>) or failure (<code class="docutils literal notranslate"><span class="pre">1</span></code>)</p></td>
+</tr>
+<tr class="row-odd"><td><p>Size-1</p></td>
+<td><p>Error</p></td>
+<td><p>If Status is 1, this indicates the type of error.</p></td>
+</tr>
+</tbody>
+</table>
+<p>For ESP32-P4 ROM (only, not the stub loader) the final four bytes are used, but only the first two bytes contain status information:</p>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Byte</p></th>
+<th class="head"><p>Name</p></th>
+<th class="head"><p>Comment</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>Size-4</p></td>
+<td><p>Status</p></td>
+<td><p>Status flag, success (<code class="docutils literal notranslate"><span class="pre">0</span></code>) or failure (<code class="docutils literal notranslate"><span class="pre">1</span></code>)</p></td>
+</tr>
+<tr class="row-odd"><td><p>Size-3</p></td>
+<td><p>Error</p></td>
+<td><p>If Status 1, this indicates the type of error.</p></td>
+</tr>
+<tr class="row-even"><td><p>Size-2</p></td>
+<td><p>Reserved</p></td>
+<td></td>
+</tr>
+<tr class="row-odd"><td><p>Size-1</p></td>
+<td><p>Reserved</p></td>
+<td></td>
+</tr>
+</tbody>
+</table>
+</section>
+<section id="rom-loader-errors">
+<h4>ROM Loader Errors<a class="headerlink" href="#rom-loader-errors" title="Permalink to this heading"></a></h4>
+<p>The ROM loader sends the following error values</p>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Value</p></th>
+<th class="head"><p>Meaning</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0x00</span></code></p></td>
+<td><p>“Undefined errors”</p></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0x01</span></code></p></td>
+<td><p>“The input parameter is invalid”</p></td>
+</tr>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0x02</span></code></p></td>
+<td><p>“Failed to malloc memory from system”</p></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0x03</span></code></p></td>
+<td><p>“Failed to send out message”</p></td>
+</tr>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0x04</span></code></p></td>
+<td><p>“Failed to receive message”</p></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0x05</span></code></p></td>
+<td><p>“The format of the received message is invalid”</p></td>
+</tr>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0x06</span></code></p></td>
+<td><p>“Message is ok, but the running result is wrong”</p></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0x07</span></code></p></td>
+<td><p>“Checksum error”</p></td>
+</tr>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0x08</span></code></p></td>
+<td><p>“Flash write error” - after writing a block of data to flash,
+the ROM loader reads the value back and the 8-bit CRC is compared
+to the data read from flash. If they don’t match, this error is returned.</p></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0x09</span></code></p></td>
+<td><p>“Flash read error” - SPI read failed</p></td>
+</tr>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0x0a</span></code></p></td>
+<td><p>“Flash read length error” - SPI read request length is wrong</p></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0x0b</span></code></p></td>
+<td><p>“Deflate failed error” (compressed uploads only)</p></td>
+</tr>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0x0c</span></code></p></td>
+<td><p>“Deflate Adler32 error”</p></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0x0d</span></code></p></td>
+<td><p>“Deflate parameter error”</p></td>
+</tr>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0x0e</span></code></p></td>
+<td><p>“Invalid RAM binary size”</p></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0x0f</span></code></p></td>
+<td><p>“Invalid RAM binary address”</p></td>
+</tr>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0x64</span></code></p></td>
+<td><p>“Invalid parameter”</p></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0x65</span></code></p></td>
+<td><p>“Invalid format”</p></td>
+</tr>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0x66</span></code></p></td>
+<td><p>“Description too long”</p></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0x67</span></code></p></td>
+<td><p>“Bad encoding description”</p></td>
+</tr>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0x69</span></code></p></td>
+<td><p>“Insufficient storage”</p></td>
+</tr>
+</tbody>
+</table>
+</section>
+<section id="stub-loader-status-error">
+<h4>Stub Loader Status &amp; Error<a class="headerlink" href="#stub-loader-status-error" title="Permalink to this heading"></a></h4>
+<p>If the stub loader is used:</p>
+<ul class="simple">
+<li><p>The status response is always 2 bytes regardless of chip type.</p></li>
+<li><p>Stub loader error codes are entirely different to the ROM loader codes. They all take the form <code class="docutils literal notranslate"><span class="pre">0xC*</span></code>, or <code class="docutils literal notranslate"><span class="pre">0xFF</span></code> for “unimplemented command”. (<a class="reference external" href="https://github.com/espressif/esptool/blob/master/flasher_stub/include/stub_flasher.h#L95">Full list here</a>).</p></li>
+</ul>
+<p>After sending a command, the host should continue to read response packets until one is received where the Command field matches the request’s Command field, or a timeout is exceeded.</p>
+</section>
+</section>
+<section id="commands">
+<h3>Commands<a class="headerlink" href="#commands" title="Permalink to this heading"></a></h3>
+<section id="supported-by-stub-loader-and-rom-loader">
+<h4>Supported by Stub Loader and ROM Loader<a class="headerlink" href="#supported-by-stub-loader-and-rom-loader" title="Permalink to this heading"></a></h4>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Byte</p></th>
+<th class="head"><p>Name</p></th>
+<th class="head"><p>Description</p></th>
+<th class="head"><p>Input Data</p></th>
+<th class="head"><p>Output Data</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0x02</span></code></p></td>
+<td><p>FLASH_BEGIN</p></td>
+<td><p><a class="reference external" href="#writing-data">Begin Flash Download</a></p></td>
+<td><p>Four 32-bit words: size to erase, number of data packets, data size in one packet, flash offset. A fifth 32-bit word passed to ROM loader only: <code class="docutils literal notranslate"><span class="pre">1</span></code> to begin encrypted flash, <code class="docutils literal notranslate"><span class="pre">0</span></code> to not.</p></td>
+<td></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0x03</span></code></p></td>
+<td><p>FLASH_DATA</p></td>
+<td><p><a class="reference external" href="#writing-data">Flash Download Data</a></p></td>
+<td><p>Four 32-bit words: data size, sequence number, <code class="docutils literal notranslate"><span class="pre">0</span></code>, <code class="docutils literal notranslate"><span class="pre">0</span></code>, then data. Uses <a class="reference internal" href="#checksum">Checksum</a>.</p></td>
+<td></td>
+</tr>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0x04</span></code></p></td>
+<td><p>FLASH_END</p></td>
+<td><p><a class="reference external" href="#writing-data">Finish Flash Download</a></p></td>
+<td><p>One 32-bit word: <code class="docutils literal notranslate"><span class="pre">0</span></code> to reboot, <code class="docutils literal notranslate"><span class="pre">1</span></code> to run user code. Not necessary to send this command if you wish to stay in the loader</p></td>
+<td></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0x05</span></code></p></td>
+<td><p>MEM_BEGIN</p></td>
+<td><p><a class="reference external" href="#writing-data">Begin RAM Download Start</a></p></td>
+<td><p>Total size, number of data packets, data size in one packet, memory offset</p></td>
+<td></td>
+</tr>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0x06</span></code></p></td>
+<td><p>MEM_END</p></td>
+<td><p><a class="reference external" href="#writing-data">Finish RAM Download</a></p></td>
+<td><p>Two 32-bit words: execute flag, entry point address</p></td>
+<td></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0x07</span></code></p></td>
+<td><p>MEM_DATA</p></td>
+<td><p><a class="reference external" href="#writing-data">RAM Download Data</a></p></td>
+<td><p>Four 32-bit words: data size, sequence number, <code class="docutils literal notranslate"><span class="pre">0</span></code>, <code class="docutils literal notranslate"><span class="pre">0</span></code>, then data. Uses <a class="reference internal" href="#checksum">Checksum</a>.</p></td>
+<td></td>
+</tr>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0x08</span></code></p></td>
+<td><p>SYNC</p></td>
+<td><p><a class="reference external" href="#initial-synchronisation">Sync Frame</a></p></td>
+<td><p>36 bytes: <code class="docutils literal notranslate"><span class="pre">0x07</span> <span class="pre">0x07</span> <span class="pre">0x12</span> <span class="pre">0x20</span></code>, followed by 32 x <code class="docutils literal notranslate"><span class="pre">0x55</span></code></p></td>
+<td></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0x09</span></code></p></td>
+<td><p>WRITE_REG</p></td>
+<td><p><a class="reference external" href="#32-bit-readwrite">Write 32-bit memory address</a></p></td>
+<td><p>Four 32-bit words: address, value, mask and delay (in microseconds)</p></td>
+<td></td>
+</tr>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0x0a</span></code></p></td>
+<td><p>READ_REG</p></td>
+<td><p><a class="reference external" href="#32-bit-readwrite">Read 32-bit memory address</a></p></td>
+<td><p>Address as 32-bit word</p></td>
+<td><p>Read data as 32-bit word in <code class="docutils literal notranslate"><span class="pre">value</span></code> field.</p></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0x0b</span></code></p></td>
+<td><p>SPI_SET_PARAMS</p></td>
+<td><p><a class="reference external" href="#spi-set-parameters">Configure SPI flash</a></p></td>
+<td><p>Six 32-bit words: id, total size in bytes, block size, sector size, page size, status mask.</p></td>
+<td></td>
+</tr>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0x0d</span></code></p></td>
+<td><p>SPI_ATTACH</p></td>
+<td><p><a class="reference external" href="#spi-attach-command">Attach SPI flash</a></p></td>
+<td><p>32-bit word: Zero for normal SPI flash. A second 32-bit word (should be <code class="docutils literal notranslate"><span class="pre">0</span></code>) is passed to ROM loader only.</p></td>
+<td></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0x0f</span></code></p></td>
+<td><p>CHANGE_BAUDRATE</p></td>
+<td><p><a class="reference external" href="#initial-synchronisation">Change Baud rate</a></p></td>
+<td><p>Two 32-bit words: new baud rate, <code class="docutils literal notranslate"><span class="pre">0</span></code> if we are talking to the ROM loader or the current/old baud rate if we are talking to the stub loader.</p></td>
+<td></td>
+</tr>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0x10</span></code></p></td>
+<td><p>FLASH_DEFL_BEGIN</p></td>
+<td><p><a class="reference external" href="#writing-data">Begin compressed flash download</a></p></td>
+<td><p>Four 32-bit words: uncompressed size, number of data packets, data packet size, flash offset. With stub loader the uncompressed size is exact byte count to be written, whereas on ROM bootloader it is rounded up to flash erase block size.
+A fifth 32-bit word passed to ROM loader only: <code class="docutils literal notranslate"><span class="pre">1</span></code> to begin encrypted flash, <code class="docutils literal notranslate"><span class="pre">0</span></code> to not.</p></td>
+<td></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0x11</span></code></p></td>
+<td><p>FLASH_DEFL_DATA</p></td>
+<td><p><a class="reference external" href="#writing-data">Compressed flash download data</a></p></td>
+<td><p>Four 32-bit words: data size, sequence number, <code class="docutils literal notranslate"><span class="pre">0</span></code>, <code class="docutils literal notranslate"><span class="pre">0</span></code>, then data. Uses <a class="reference internal" href="#checksum">Checksum</a>.</p></td>
+<td><p>Error code <code class="docutils literal notranslate"><span class="pre">0xC1</span></code> on checksum error.</p></td>
+</tr>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0x12</span></code></p></td>
+<td><p>FLASH_DEFL_END</p></td>
+<td><p><a class="reference external" href="#writing-data">End compressed flash download</a></p></td>
+<td><p>One 32-bit word: <code class="docutils literal notranslate"><span class="pre">0</span></code> to reboot, <code class="docutils literal notranslate"><span class="pre">1</span></code> to run user code. Not necessary to send this command if you wish to stay in the loader.</p></td>
+<td></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0x13</span></code></p></td>
+<td><p>SPI_FLASH_MD5</p></td>
+<td><p><a class="reference external" href="#verifying-uploaded-data">Calculate MD5 of flash region</a></p></td>
+<td><p>Four 32-bit words: address, size, <code class="docutils literal notranslate"><span class="pre">0</span></code>, <code class="docutils literal notranslate"><span class="pre">0</span></code></p></td>
+<td><p>Body contains 16 raw bytes of MD5 followed by 2 status bytes (stub loader) or 32 hex-coded ASCII (ROM loader) of calculated MD5</p></td>
+</tr>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0x14</span></code></p></td>
+<td><p>GET_SECURITY_INFO</p></td>
+<td><p>Read chip security info</p></td>
+<td></td>
+<td><p>32 bits <code class="docutils literal notranslate"><span class="pre">flags</span></code>, 1 byte <code class="docutils literal notranslate"><span class="pre">flash_crypt_cnt</span></code>, 7x1 byte <code class="docutils literal notranslate"><span class="pre">key_purposes</span></code>, 32-bit word <code class="docutils literal notranslate"><span class="pre">chip_id</span></code>, 32-bit word <code class="docutils literal notranslate"><span class="pre">eco_version</span></code></p></td>
+</tr>
+</tbody>
+</table>
+</section>
+<section id="supported-by-stub-loader-only">
+<h4>Supported by Stub Loader Only<a class="headerlink" href="#supported-by-stub-loader-only" title="Permalink to this heading"></a></h4>
+<p>ROM loaders will not recognize these commands.</p>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Byte</p></th>
+<th class="head"><p>Name</p></th>
+<th class="head"><p>Description</p></th>
+<th class="head"><p>Input</p></th>
+<th class="head"><p>Output</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0xd0</span></code></p></td>
+<td><p>ERASE_FLASH</p></td>
+<td><p>Erase entire flash chip</p></td>
+<td></td>
+<td></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0xd1</span></code></p></td>
+<td><p>ERASE_REGION</p></td>
+<td><p>Erase flash region</p></td>
+<td><p>Two 32-bit words: flash offset to erase, erase size in bytes. Both must be multiples of flash sector size.</p></td>
+<td></td>
+</tr>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0xd2</span></code></p></td>
+<td><p>READ_FLASH</p></td>
+<td><p><a class="reference external" href="#reading-flash">Read flash</a></p></td>
+<td><p>Four 32-bit words: flash offset, read length, flash sector size, read packet size, maximum number of un-acked packets</p></td>
+<td></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0xd3</span></code></p></td>
+<td><p>RUN_USER_CODE</p></td>
+<td><p>Exits loader and runs user code</p></td>
+<td></td>
+<td></td>
+</tr>
+</tbody>
+</table>
+</section>
+<section id="supported-in-secure-download-mode">
+<span id="supported-in-sdm"></span><h4>Supported in Secure Download Mode<a class="headerlink" href="#supported-in-secure-download-mode" title="Permalink to this heading"></a></h4>
+<p>Secure Download Mode is a restricted version of the ROM Loader available on Espressif chips. It only allows a limited set of commands:</p>
+<ul class="simple">
+<li><p>synchronisation (<code class="docutils literal notranslate"><span class="pre">SYNC</span></code>)</p></li>
+<li><p>attaching SPI flash (<code class="docutils literal notranslate"><span class="pre">SPI_ATTACH</span></code>)</p></li>
+<li><p>updating SPI config (<code class="docutils literal notranslate"><span class="pre">SPI_SET_PARAMS</span></code>)</p></li>
+<li><p>changing baud rate (<code class="docutils literal notranslate"><span class="pre">CHANGE_BAUDRATE</span></code>)</p></li>
+<li><p>basic flash write (<code class="docutils literal notranslate"><span class="pre">FLASH_BEGIN</span></code>, <code class="docutils literal notranslate"><span class="pre">FLASH_DATA</span></code>, <code class="docutils literal notranslate"><span class="pre">FLASH_END</span></code>)</p></li>
+<li><p>reading a summary of currently enabled security features (<code class="docutils literal notranslate"><span class="pre">GET_SECURITY_INFO</span></code>)</p></li>
+</ul>
+<p>Any other command (e.g., reading or writing memory, arbitrary code execution through loading to RAM, …) will result in an error.</p>
+<p>You can read more about Secure Download Mode in the <a class="reference external" href="https://docs.espressif.com/projects/esp-idf/en/stable/esp32p4/security/security.html#uart-download-mode">ESP-IDF Security Overview</a> or read about its <a class="reference internal" href="../troubleshooting.html#sdm-limitations"><span class="std std-ref">limitations here</span></a>.</p>
+</section>
+</section>
+<section id="checksum">
+<h3>Checksum<a class="headerlink" href="#checksum" title="Permalink to this heading"></a></h3>
+<p>The checksum field is ignored (can be zero) for all commands except for MEM_DATA, FLASH_DATA, and FLASH_DEFL_DATA.</p>
+<p>Each of the <code class="docutils literal notranslate"><span class="pre">_DATA</span></code> command packets (like <code class="docutils literal notranslate"><span class="pre">FLASH_DEFL_DATA</span></code>, <code class="docutils literal notranslate"><span class="pre">MEM_DATA</span></code>) has the same “data payload” format:</p>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Bytes</p></th>
+<th class="head"><p>Name</p></th>
+<th class="head"><p>Format</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>0-3</p></td>
+<td><p>“Data to write” length</p></td>
+<td><p>Little endian 32-bit word.</p></td>
+</tr>
+<tr class="row-odd"><td><p>4-7</p></td>
+<td><p>Sequence number</p></td>
+<td><p>Little endian 32-bit word. The sequence numbers are 0 based.</p></td>
+</tr>
+<tr class="row-even"><td><p>8-15</p></td>
+<td><p>0</p></td>
+<td><p>Two words of all zeroes, unused.</p></td>
+</tr>
+<tr class="row-odd"><td><p>16-</p></td>
+<td><p>“Data to write”</p></td>
+<td><p>Length given at beginning of payload.</p></td>
+</tr>
+</tbody>
+</table>
+<p>The checksum is only applied to this final “data to write” section, not the first 16 bytes of data.</p>
+<p>To calculate checksum, start with seed value 0xEF and XOR each individual byte in the “data to write”. The 8-bit result is stored in the checksum field of the packet header (as a little endian 32-bit value).</p>
+<div class="admonition note">
+<p class="admonition-title">Note</p>
+<p>Because this checksum is not adequate to ensure valid data, the SPI_FLASH_MD5 command was added to validate flash contents after flashing. It is recommended that this command is always used. See <a class="reference internal" href="#verifying-uploaded-data">Verifying Uploaded Data</a>, below.</p>
+</div>
+</section>
+</section>
+<section id="functional-description">
+<h2>Functional Description<a class="headerlink" href="#functional-description" title="Permalink to this heading"></a></h2>
+<figure class="align-center" id="id5">
+<div class="align-default"><img height="725" src="../_images/blockdiag-b0756ac4bad506cab0944d38fd3c41ad966afaed.png" width="420" /></div>
+<figcaption>
+<p><span class="caption-text">Download procedure flow chart</span><a class="headerlink" href="#id5" title="Permalink to this image"></a></p>
+</figcaption>
+</figure>
+<div class="admonition note">
+<p class="admonition-title">Note</p>
+<p>This flow chart is used to illustrate the download procedure (writing to flash), other commands have different flows.</p>
+</div>
+<section id="initialization">
+<h3>Initialization<a class="headerlink" href="#initialization" title="Permalink to this heading"></a></h3>
+<p><ul class="simple">
+<li><p>The ESP chip is reset into UART bootloader mode. The host starts by sending SYNC commands. These commands have a large data payload which is also used by the ESP chip to detect the configured baud rate. ESP32-P4 always initialises at 115200bps. However the sync packets can be sent at any baud rate, and the UART peripheral will detect this.</p></li>
+<li><p>The host should wait until it sees a valid response to a SYNC command, indicating the ESP chip is correctly communicating.</p></li>
+<li><p>Chip type detection then uses various methods to identify chip type, subtype, revision, etc. See below.</p></li>
+<li><p>Esptool then (by default) uses the “RAM Download” sequence to upload <a class="reference internal" href="../esptool/flasher-stub.html#stub"><span class="std std-ref">stub loader</span></a> code to IRAM of the chip. The MEM_END command contains the entry-point address to run the stub loader.
+The stub loader then sends a custom SLIP packet of the sequence OHAI (<code class="docutils literal notranslate"><span class="pre">0xC0</span> <span class="pre">0x4F</span> <span class="pre">0x48</span> <span class="pre">0x41</span> <span class="pre">0x49</span> <span class="pre">0xC0</span></code>), indicating that it is now running. This is the only unsolicited packet ever sent by the ESP.
+If the <code class="docutils literal notranslate"><span class="pre">--no-stub</span></code> argument is supplied to esptool, this entire step is skipped.</p></li>
+<li><p>For commands which need to use the flash, the ESP32-P4 ROM an stub loader requires the SPI_ATTACH and SPI_SET_PARAMS commands. See <a class="reference internal" href="#spi-configuration-commands">SPI Configuration Commands</a>.</p></li>
+<li><p>For stub loader and/or ESP32-P4 ROM loader, the host can send a CHANGE_BAUD command to set the baud rate to an explicit value. Compared to auto-detecting during the SYNC pulse, this can be more reliable for setting very high baud rate. Esptool tries to sync at (maximum) 115200bps and then sends this command to go to a higher baud rate, if requested.</p></li>
+</ul>
+</p>
+</section>
+<section id="initialization-chip-type-detection">
+<h3>Initialization - Chip Type Detection<a class="headerlink" href="#initialization-chip-type-detection" title="Permalink to this heading"></a></h3>
+<section id="esp32-p4-chip-detection">
+<h4>ESP32-P4 Chip Detection<a class="headerlink" href="#esp32-p4-chip-detection" title="Permalink to this heading"></a></h4>
+<p>ESP32-P4 is detected by using <strong>GET_SECURITY_INFO (0x14)</strong> command and its <strong>chip-id</strong> value.</p>
+</section>
+<section id="overview-of-detection-for-all-chips">
+<h4>Overview of Detection for All Chips<a class="headerlink" href="#overview-of-detection-for-all-chips" title="Permalink to this heading"></a></h4>
+<figure class="align-center" id="id6">
+<div class="align-default"><img height="640" src="../_images/blockdiag-4db88f1b40431100ebbd1950bbf9db2615cf555a.png" width="610" /></div>
+<figcaption>
+<p><span class="caption-text">All chips detection flow chart</span><a class="headerlink" href="#id6" title="Permalink to this image"></a></p>
+</figcaption>
+</figure>
+<p>On older devices that do not support the <strong>GET_SECURITY_INFO (0x14)</strong> command (which provides the <strong>chip-id</strong>), esptool falls back to reading a <strong>magic register</strong> to determine the chip type.</p>
+<p>The main exception is the <strong>ESP32-S2</strong>: although it supports the <strong>GET_SECURITY_INFO (0x14)</strong> command, the output lacks the <strong>chip-id</strong>. Therefore, esptool uses the <strong>magic register</strong> as a fallback for this chip as well.
+If reading the register also fails, it indicates the chip is in <strong>secure download</strong> mode.</p>
+<p>For details see: <a class="reference external" href="https://github.com/espressif/esptool/blob/v5.0.2/esptool/cmds.py#L101">esptool chip detection code</a></p>
+</section>
+</section>
+<section id="writing-data">
+<h3>Writing Data<a class="headerlink" href="#writing-data" title="Permalink to this heading"></a></h3>
+<p>(Includes RAM Download, Flash Download, Compressed Flash Download.)</p>
+<p><ul class="simple">
+<li><p>RAM Download (MEM_BEGIN, MEM_DATA, MEM_END) loads data into the ESP chip memory space and (optionally) executes it.</p></li>
+<li><p>Flash Download (FLASH_BEGIN, FLASH_DATA) flashes data into the ESP SPI flash.</p></li>
+<li><p>Compressed Flash Download is the same, only the data is compressed using the gzip Deflate algorithm to reduce serial overhead.</p></li>
+</ul>
+</p>
+<p>All three of these sequences follow a similar pattern:</p>
+<ul class="simple">
+<li><p>A _BEGIN command (FLASH_BEGIN, etc) is sent which contains basic parameters for the flash erase size, start address to write to, etc. The uploader also needs to specify how many “blocks” of data (ie individual data packets) will be sent, and how big each packet is.</p></li>
+<li><p>One or more _DATA commands (FLASH_DATA, etc) is sent where the data payload contains the actual data to write to flash/RAM. In the case of Compressed Flash Downloads, the data is compressed using the gzip deflate algorithm. The number of _DATA commands is specified in the _BEGIN command, as is the size of each _DATA payload.
+The last data block should be padded to the block size with 0xFF bytes.</p></li>
+<li><p>An _END command (FLASH_END, etc) is sent to exit the bootloader and optionally reset the chip (or jump to an address in RAM, in the case of MEM_END). Not necessary to send after flashing if you wish to continue sending other or different commands.</p></li>
+</ul>
+<p>It’s not necessary to send flash erase commands before sending commands to write to flash, etc. The ROM loaders erase the to-be-written region in response to the FLASH_BEGIN command.
+The stub loader does just-in-time erasing as it writes data, to maximize overall flashing performance (each block of data is read into RAM via serial while the previous block is simultaneously being written to flash, and 4KB and 64KB erases are done as needed before writing to flash).</p>
+<p>The block size chosen should be small enough to fit into RAM of the device. Esptool uses 16KB which gives good performance when used with the stub loader.</p>
+<section id="verifying-uploaded-data">
+<h4>Verifying Uploaded Data<a class="headerlink" href="#verifying-uploaded-data" title="Permalink to this heading"></a></h4>
+<p>The 8-bit checksum used in the upload protocol is not sufficient to ensure valid flash contents after upload. The uploader should send the SPI_FLASH_MD5 command or use another method to verify flash contents.</p>
+<p>The SPI_FLASH_MD5 command passes the start address in flash and the size of data to calculate. The MD5 value is returned in the response payload, before the status bytes.</p>
+<p>Note that the ESP32-P4 ROM loader returns the md5sum as 32 hex encoded ASCII bytes, whereas the stub loader returns the md5sum as 16 raw data bytes of MD5 followed by 2 status bytes.</p>
+</section>
+</section>
+<section id="spi-configuration-commands">
+<h3>SPI Configuration Commands<a class="headerlink" href="#spi-configuration-commands" title="Permalink to this heading"></a></h3>
+<section id="spi-attach-command">
+<h4>SPI Attach Command<a class="headerlink" href="#spi-attach-command" title="Permalink to this heading"></a></h4>
+<p>The SPI_ATTACH command enables the SPI flash interface. It takes a 32-bit data payload which is used to determine which SPI peripheral and pins should be used to connect to SPI flash.</p>
+<p>On the ESP32-P4 stub loader sending this command before interacting with SPI flash is optional. On ESP32-P4 ROM loader, it is required to send this command before interacting with SPI flash.</p>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Value</p></th>
+<th class="head"><p>Meaning</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>0</p></td>
+<td><p>Default SPI flash interface</p></td>
+</tr>
+<tr class="row-odd"><td><p>1</p></td>
+<td><p>HSPI interface</p></td>
+</tr>
+<tr class="row-even"><td><p>(other values)</p></td>
+<td><p>Pin numbers as 6-bit values, packed into a 30-bit value. Order (from MSB): HD pin, Q pin, D pin, CS pin, CLK pin.</p></td>
+</tr>
+</tbody>
+</table>
+<p>The “Default SPI flash interface” uses pins configured via the <code class="docutils literal notranslate"><span class="pre">SPI_PAD_CONFIG_xxx</span></code> eFuses (if unset, these eFuses are all zero and the default SPI flash pins given in the datasheet are used.)</p>
+<p>When writing the values of each pin as 6-bit numbers packed into the data word, each 6-bit value uses the following representation:</p>
+<p>On ESP32-P4 ROM loader only, there is an additional 4 bytes in the data payload of this command. These bytes should all be set to zero.</p>
+</section>
+<section id="spi-set-parameters">
+<h4>SPI Set Parameters<a class="headerlink" href="#spi-set-parameters" title="Permalink to this heading"></a></h4>
+<p>The SPI_SET_PARAMS command sets some parameters of the attached SPI flash chip (sizes, etc).</p>
+<p>All the values which are passed except total size are hardcoded, and most are not used when writing to flash. See <a class="reference external" href="https://github.com/espressif/esptool/blob/da31d9d7a1bb496995f8e30a6be259689948e43e/esptool.py#L655">flash_set_parameters function</a> in esptool for the values which it sends.</p>
+</section>
+</section>
+<section id="bit-read-write">
+<h3>32-Bit Read/Write<a class="headerlink" href="#bit-read-write" title="Permalink to this heading"></a></h3>
+<p>The 32-bit read/write commands (READ_REG, WRITE_REG) allow word-oriented reading and writing of memory and register data.</p>
+<p>These commands can be used to manipulate peripherals in arbitrary ways. For example, the esptool “flash id” functionality is implemented by manipulating the SPI peripheral registers to send a JEDEC flash ID command to the flash chip and read the response.</p>
+</section>
+<section id="reading-flash">
+<h3>Reading Flash<a class="headerlink" href="#reading-flash" title="Permalink to this heading"></a></h3>
+<p>The stub loader implements a READ_FLASH command. This command behaves differently to other commands, including the ROM loader’s READ_FLASH command:</p>
+<ul class="simple">
+<li><p>The host sends the READ_FLASH command and the data payload contains the offset, read size, size of each individual packet of data, and the maximum number of “un-acknowledged” data packets which can be in flight at one time.</p></li>
+<li><p>The stub loader will send a standard response packet, with no additional data payload.</p></li>
+<li><p>Now the stub loader will start sending SLIP packets with raw data (of the size requested in the command). There is no metadata included with these SLIP packets.</p></li>
+<li><p>After each SLIP packet is received, the host should send back a 4 byte raw SLIP acknowledgement packet with the total number of bytes which have been received. There is no header or other metadata included with these SLIP packets.</p></li>
+<li><p>The stub loader may send up to a maximum number (specified by the host in the READ_FLASH commands) of data packets before waiting for the first acknowledgement packet. No more than this “max in flight” limit can be un-acknowledged at any one time.</p></li>
+<li><p>After all data packets are acknowledged received, the stub loader sends a 16 byte MD5 digest of all the data which was read from flash. This is also sent as a raw SLIP packet, with no metadata.</p></li>
+</ul>
+<p>After the read flash process is complete, the stub loader goes back to normal command/response operation.</p>
+<p>The ROM loader read flash command is more normal but also much slower to read data.</p>
+</section>
+</section>
+<section id="tracing-esptool-serial-communications">
+<span id="tracing-communications"></span><h2>Tracing Esptool Serial Communications<a class="headerlink" href="#tracing-esptool-serial-communications" title="Permalink to this heading"></a></h2>
+<p>esptool has a <code class="docutils literal notranslate"><span class="pre">--trace</span></code> option which can be supplied in the first group of arguments (before the command). This will dump all traffic sent and received via the serial port to the console.</p>
+<p>Here is a sample extract, showing a READ_REG command and response:</p>
+<div class="highlight-default notranslate"><div class="highlight"><pre><span></span><span class="n">TRACE</span> <span class="o">+</span><span class="mf">0.000</span> <span class="o">---</span> <span class="n">Cmd</span> <span class="n">READ_REG</span> <span class="p">(</span><span class="mh">0x0a</span><span class="p">)</span> <span class="o">|</span> <span class="n">data_len</span> <span class="mi">4</span> <span class="o">|</span> <span class="n">wait_response</span> <span class="mi">1</span> <span class="o">|</span> <span class="n">timeout</span> <span class="mf">3.000</span> <span class="o">|</span> <span class="n">data</span> <span class="mi">00100040</span> <span class="o">---</span>
+<span class="n">TRACE</span> <span class="o">+</span><span class="mf">0.000</span> <span class="n">Write</span> <span class="mi">14</span> <span class="nb">bytes</span><span class="p">:</span> <span class="n">c0000a04000000000000100040c0</span>
+<span class="n">TRACE</span> <span class="o">+</span><span class="mf">0.046</span> <span class="n">Read</span> <span class="mi">1</span> <span class="nb">bytes</span><span class="p">:</span> <span class="n">c0</span>
+<span class="n">TRACE</span> <span class="o">+</span><span class="mf">0.000</span> <span class="n">Read</span> <span class="mi">11</span> <span class="nb">bytes</span><span class="p">:</span> <span class="mi">010</span><span class="n">a0200090000000000c0</span>
+<span class="n">TRACE</span> <span class="o">+</span><span class="mf">0.000</span> <span class="n">Received</span> <span class="n">full</span> <span class="n">packet</span><span class="p">:</span> <span class="mi">010</span><span class="n">a0200090000000000</span>
+</pre></div>
+</div>
+<p>The +X.XXX value is the time delta (in seconds) since the last trace line.</p>
+<p>Values are printed in hexadecimal. If more than 16 bytes is printed at one time, a split display is used with hexadecimal bytes on the left and ASCII on the right. Non-printable characters are represented as <code class="docutils literal notranslate"><span class="pre">.</span></code> in ASCII:</p>
+<p>Note that multiple protocol layers are represented in the logs. The “Write X bytes” lines show exactly which bytes are being sent “over the wire”, including SLIP framing. Similarly the “Read X bytes” lines show what bytes are being read over the wire, including any SLIP framing.
+Once a full SLIP packet is read, the same bytes - as a SLIP payload with any escaping removed - appear in the “Received full packet” log lines.</p>
+<p>Here is a second example showing part of the initial synchronization sequence (lots of 0x55 bytes which are <code class="docutils literal notranslate"><span class="pre">U</span></code> in ASCII):</p>
+<div class="highlight-default notranslate"><div class="highlight"><pre><span></span>TRACE +0.000 Write 46 bytes:
+ c000082400000000 0007071220555555 | ...$........ UUU
+ 5555555555555555 5555555555555555 | UUUUUUUUUUUUUUUU
+ 5555555555555555 5555555555c0 | UUUUUUUUUUUUU.
+TRACE +0.012 Read 1 bytes: c0
+TRACE +0.000 Read 63 bytes:
+ 0108040007071220 00000000c0c00108 | ....... ........
+ 0400070712200000 0000c0c001080400 | ..... ..........
+ 0707122000000000 c0c0010804000707 | ... ............
+ 122000000000c0c0 01080400070712 | . .............
+TRACE +0.000 Received full packet: 010804000707122000000000
+TRACE +0.000 Received full packet: 010804000707122000000000
+</pre></div>
+</div>
+<div class="admonition important">
+<p class="admonition-title">Important</p>
+<p>If you don’t plan to use the esptool stub loader, pass <code class="docutils literal notranslate"><span class="pre">--no-stub</span> <span class="pre">--trace</span></code> to see interactions with the chip’s built-in ROM loader only. Otherwise, the trace will show the full binary upload of the loader.</p>
+</div>
+<p>In addition to this trace feature, most operating systems have “system call trace” or “port trace” features which can be used to dump serial interactions.</p>
+</section>
+</section>
+
+
+ </div>
+ </div>
+ <footer><div class="rst-footer-buttons" role="navigation" aria-label="Footer">
+ <a href="firmware-image-format.html" class="btn btn-neutral float-left" title="Firmware Image Format" accesskey="p" rel="prev"><span class="fa fa-arrow-circle-left" aria-hidden="true"></span> Previous</a>
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diff --git a/cpu-docs/espressif-software/esptool_serial-protocol_v5.3.1.rst b/cpu-docs/espressif-software/esptool_serial-protocol_v5.3.1.rst
new file mode 100644
index 0000000..8d726c1
--- /dev/null
+++ b/cpu-docs/espressif-software/esptool_serial-protocol_v5.3.1.rst
@@ -0,0 +1,584 @@
+{IDF_TARGET_SECURITY_INFO:default="32 bits ``flags``, 1 byte ``flash_crypt_cnt``, 7x1 byte ``key_purposes``, 32-bit word ``chip_id``, 32-bit word ``eco_version``", esp32s2="32 bits ``flags``, 1 byte ``flash_crypt_cnt``, 7x1 byte ``key_purposes`` "}
+
+.. _serial-protocol:
+
+Serial Protocol
+===============
+
+This is technical documentation for the serial protocol used by the UART bootloader in the {IDF_TARGET_NAME} ROM and the esptool :ref:`stub loader <stub>` program.
+
+The UART bootloader runs on chip reset if certain strapping pins are set. See :ref:`entering-the-bootloader` for details of this process.
+
+By default, esptool uploads a stub "software loader" to the IRAM of the chip. The stub loader then replaces the ROM loader for all future interactions. This standardizes much of the behavior. Pass ``--no-stub`` to esptool in order to disable the stub loader. See :ref:`stub` for more information.
+
+.. note::
+
+ There are differences in the serial protocol between ESP chips! To switch to documentation for a different chip, choose the desired target from the dropdown menu in the upper left corner.
+
+Packet Description
+------------------
+
+The host computer sends a SLIP encoded command request to the ESP chip. The ESP chip responds to the request with a SLIP encoded response packet, including status information and any data as a payload.
+
+.. _low-level-protocol:
+
+Low Level Protocol
+^^^^^^^^^^^^^^^^^^
+
+The bootloader protocol uses `SLIP <https://en.wikipedia.org/wiki/Serial_Line_Internet_Protocol>`_ packet framing for data transmissions in both directions.
+
+Each SLIP packet begins and ends with ``0xC0``. Within the packet, all occurrences of ``0xC0`` and ``0xDB`` are replaced with ``0xDB 0xDC`` and ``0xDB 0xDD``, respectively. The replacing is to be done **after** the checksum and lengths are calculated, so the packet length may be longer than the ``size`` field below.
+
+Command Packet
+^^^^^^^^^^^^^^
+
+Each command is a SLIP packet initiated by the host and results in a response packet. Inside the packet, the packet consists of a header and a variable-length body. All multi-byte fields are little-endian.
+
+.. packetdiag:: diag/command_packet_format.diag
+ :caption: Command packet format
+ :align: center
+
+
++--------+-------------+--------------------------------------------------------------------------------------------------------------------+
+| Byte | Name | Comment |
++========+=============+====================================================================================================================+
+| 0 | Direction | Always ``0x00`` for requests |
++--------+-------------+--------------------------------------------------------------------------------------------------------------------+
+| 1 | Command | Command identifier (see `Commands`_). |
++--------+-------------+--------------------------------------------------------------------------------------------------------------------+
+| 2-3 | Size | Length of Data field, in bytes. |
++--------+-------------+--------------------------------------------------------------------------------------------------------------------+
+| 4-7 | Checksum | Simple checksum of part of the data field (only used for some commands, see `Checksum`_). |
++--------+-------------+--------------------------------------------------------------------------------------------------------------------+
+| 8..n | Data | Variable length data payload (0-65535 bytes, as indicated by Size parameter). Usage depends on specific command. |
++--------+-------------+--------------------------------------------------------------------------------------------------------------------+
+
+Response Packet
+^^^^^^^^^^^^^^^
+
+Each received command will result in a response SLIP packet sent from the ESP chip to the host. Contents of the response packet is:
+
+.. packetdiag:: diag/response_packet_format.diag
+ :caption: Command packet format
+ :align: center
+
++--------+-------------+--------------------------------------------------------------------------------------------------------------+
+| Byte | Name | Comment |
++========+=============+==============================================================================================================+
+| 0 | Direction | Always ``0x01`` for responses |
++--------+-------------+--------------------------------------------------------------------------------------------------------------+
+| 1 | Command | Same value as Command identifier in the request packet that triggered the response |
++--------+-------------+--------------------------------------------------------------------------------------------------------------+
+| 2-3 | Size | Size of data field. At least the length of the `Status Bytes`_ (2 or 4 bytes, see below). |
++--------+-------------+--------------------------------------------------------------------------------------------------------------+
+| 4-7 | Value | Response value used by READ_REG command (see below). Zero otherwise. |
++--------+-------------+--------------------------------------------------------------------------------------------------------------+
+| 8..n | Data | Variable length data payload. Length indicated by "Size" field. |
++--------+-------------+--------------------------------------------------------------------------------------------------------------+
+
+Status Bytes
+""""""""""""
+
+The final bytes of the Data payload indicate command status:
+
+.. only:: esp8266
+
+ For stub loader and ESP8266 ROM loader the final two bytes indicate status (most commands return at least a two byte Data payload):
+
+.. only:: not esp8266
+
+ For stub loader the final two bytes indicate status (most commands return at least a two byte Data payload):
+
++----------+----------+-----------------------------------------------------+
+| Byte | Name | Comment |
++==========+==========+=====================================================+
+| Size-2 | Status | Status flag, success (``0``) or failure (``1``) |
++----------+----------+-----------------------------------------------------+
+| Size-1 | Error | If Status is 1, this indicates the type of error. |
++----------+----------+-----------------------------------------------------+
+
+.. only:: not esp8266
+
+ For {IDF_TARGET_NAME} ROM (only, not the stub loader) the final four bytes are used, but only the first two bytes contain status information:
+
+ +----------+------------+---------------------------------------------------+
+ | Byte | Name | Comment |
+ +==========+============+===================================================+
+ | Size-4 | Status | Status flag, success (``0``) or failure (``1``) |
+ +----------+------------+---------------------------------------------------+
+ | Size-3 | Error | If Status 1, this indicates the type of error. |
+ +----------+------------+---------------------------------------------------+
+ | Size-2 | Reserved | |
+ +----------+------------+---------------------------------------------------+
+ | Size-1 | Reserved | |
+ +----------+------------+---------------------------------------------------+
+
+ROM Loader Errors
+"""""""""""""""""
+
+The ROM loader sends the following error values
+
++----------+---------------------------------------------------------------------------+
+| Value | Meaning |
++==========+===========================================================================+
+| ``0x00`` | "Undefined errors" |
++----------+---------------------------------------------------------------------------+
+| ``0x01`` | "The input parameter is invalid" |
++----------+---------------------------------------------------------------------------+
+| ``0x02`` | "Failed to malloc memory from system" |
++----------+---------------------------------------------------------------------------+
+| ``0x03`` | "Failed to send out message" |
++----------+---------------------------------------------------------------------------+
+| ``0x04`` | "Failed to receive message" |
++----------+---------------------------------------------------------------------------+
+| ``0x05`` | "The format of the received message is invalid" |
++----------+---------------------------------------------------------------------------+
+| ``0x06`` | "Message is ok, but the running result is wrong" |
++----------+---------------------------------------------------------------------------+
+| ``0x07`` | "Checksum error" |
++----------+---------------------------------------------------------------------------+
+| ``0x08`` | "Flash write error" - after writing a block of data to flash, |
+| | the ROM loader reads the value back and the 8-bit CRC is compared |
+| | to the data read from flash. If they don't match, this error is returned. |
++----------+---------------------------------------------------------------------------+
+| ``0x09`` | "Flash read error" - SPI read failed |
++----------+---------------------------------------------------------------------------+
+| ``0x0a`` | "Flash read length error" - SPI read request length is wrong |
++----------+---------------------------------------------------------------------------+
+| ``0x0b`` | "Deflate failed error" (compressed uploads only) |
++----------+---------------------------------------------------------------------------+
+| ``0x0c`` | "Deflate Adler32 error" |
++----------+---------------------------------------------------------------------------+
+| ``0x0d`` | "Deflate parameter error" |
++----------+---------------------------------------------------------------------------+
+| ``0x0e`` | "Invalid RAM binary size" |
++----------+---------------------------------------------------------------------------+
+| ``0x0f`` | "Invalid RAM binary address" |
++----------+---------------------------------------------------------------------------+
+| ``0x64`` | "Invalid parameter" |
++----------+---------------------------------------------------------------------------+
+| ``0x65`` | "Invalid format" |
++----------+---------------------------------------------------------------------------+
+| ``0x66`` | "Description too long" |
++----------+---------------------------------------------------------------------------+
+| ``0x67`` | "Bad encoding description" |
++----------+---------------------------------------------------------------------------+
+| ``0x69`` | "Insufficient storage" |
++----------+---------------------------------------------------------------------------+
+
+Stub Loader Status & Error
+""""""""""""""""""""""""""
+
+If the stub loader is used:
+
+- The status response is always 2 bytes regardless of chip type.
+- Stub loader error codes are entirely different to the ROM loader codes. They all take the form ``0xC*``, or ``0xFF`` for "unimplemented command". (`Full list here <https://github.com/espressif/esptool/blob/master/flasher_stub/include/stub_flasher.h#L95>`_).
+
+After sending a command, the host should continue to read response packets until one is received where the Command field matches the request's Command field, or a timeout is exceeded.
+
+Commands
+^^^^^^^^
+
+Supported by Stub Loader and ROM Loader
+"""""""""""""""""""""""""""""""""""""""
+
+.. only:: esp8266
+
+ +------------+----------------+-------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------+
+ | Byte | Name | Description | Input Data | Output Data |
+ +============+================+=======================================================+====================================================================================================================================+================================================+
+ | ``0x02`` | FLASH_BEGIN | `Begin Flash Download <#writing-data>`__ | Four 32-bit words: size to erase, number of data packets, data size in one packet, flash offset. | |
+ +------------+----------------+-------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------+
+ | ``0x03`` | FLASH_DATA | `Flash Download Data <#writing-data>`__ | Four 32-bit words: data size, sequence number, ``0``, ``0``, then data. Uses `Checksum`_. | |
+ +------------+----------------+-------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------+
+ | ``0x04`` | FLASH_END | `Finish Flash Download <#writing-data>`__ | One 32-bit word: ``0`` to reboot, ``1`` to run user code. Not necessary to send this command if you wish to stay in the loader | |
+ +------------+----------------+-------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------+
+ | ``0x05`` | MEM_BEGIN | `Begin RAM Download Start <#writing-data>`__ | Total size, number of data packets, data size in one packet, memory offset | |
+ +------------+----------------+-------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------+
+ | ``0x06`` | MEM_END | `Finish RAM Download <#writing-data>`__ | Two 32-bit words: execute flag, entry point address | |
+ +------------+----------------+-------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------+
+ | ``0x07`` | MEM_DATA | `RAM Download Data <#writing-data>`__ | Four 32-bit words: data size, sequence number, ``0``, ``0``, then data. Uses `Checksum`_. | |
+ +------------+----------------+-------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------+
+ | ``0x08`` | SYNC | `Sync Frame <#initial-synchronisation>`__ | 36 bytes: ``0x07 0x07 0x12 0x20``, followed by 32 x ``0x55`` | |
+ +------------+----------------+-------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------+
+ | ``0x09`` | WRITE_REG | `Write 32-bit memory address <#32-bit-readwrite>`__ | Four 32-bit words: address, value, mask and delay (in microseconds) | |
+ +------------+----------------+-------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------+
+ | ``0x0a`` | READ_REG | `Read 32-bit memory address <#32-bit-readwrite>`__ | Address as 32-bit word | Read data as 32-bit word in ``value`` field. |
+ +------------+----------------+-------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------+
+
+.. only:: esp32
+
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | Byte | Name | Description | Input Data | Output Data |
+ +============+======================+================================================================+================================================================================================================================================================================================================================================+===================================================================================================================================+
+ | ``0x02`` | FLASH_BEGIN | `Begin Flash Download <#writing-data>`__ | Four 32-bit words: size to erase, number of data packets, data size in one packet, flash offset. | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x03`` | FLASH_DATA | `Flash Download Data <#writing-data>`__ | Four 32-bit words: data size, sequence number, ``0``, ``0``, then data. Uses `Checksum`_. | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x04`` | FLASH_END | `Finish Flash Download <#writing-data>`__ | One 32-bit word: ``0`` to reboot, ``1`` to run user code. Not necessary to send this command if you wish to stay in the loader | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x05`` | MEM_BEGIN | `Begin RAM Download Start <#writing-data>`__ | Total size, number of data packets, data size in one packet, memory offset | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x06`` | MEM_END | `Finish RAM Download <#writing-data>`__ | Two 32-bit words: execute flag, entry point address | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x07`` | MEM_DATA | `RAM Download Data <#writing-data>`__ | Four 32-bit words: data size, sequence number, ``0``, ``0``, then data. Uses `Checksum`_. | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x08`` | SYNC | `Sync Frame <#initial-synchronisation>`__ | 36 bytes: ``0x07 0x07 0x12 0x20``, followed by 32 x ``0x55`` | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x09`` | WRITE_REG | `Write 32-bit memory address <#32-bit-readwrite>`__ | Four 32-bit words: address, value, mask and delay (in microseconds) | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x0a`` | READ_REG | `Read 32-bit memory address <#32-bit-readwrite>`__ | Address as 32-bit word | Read data as 32-bit word in ``value`` field. |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x0b`` | SPI_SET_PARAMS | `Configure SPI flash <#spi-set-parameters>`__ | Six 32-bit words: id, total size in bytes, block size, sector size, page size, status mask. | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x0d`` | SPI_ATTACH | `Attach SPI flash <#spi-attach-command>`__ | 32-bit word: Zero for normal SPI flash. A second 32-bit word (should be ``0``) is passed to ROM loader only. | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x0f`` | CHANGE_BAUDRATE | `Change Baud rate <#initial-synchronisation>`__ | Two 32-bit words: new baud rate, ``0`` if we are talking to the ROM loader or the current/old baud rate if we are talking to the stub loader. | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x10`` | FLASH_DEFL_BEGIN | `Begin compressed flash download <#writing-data>`__ | Four 32-bit words: uncompressed size, number of data packets, data packet size, flash offset. With stub loader the uncompressed size is exact byte count to be written, whereas on ROM bootloader it is rounded up to flash erase block size. | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x11`` | FLASH_DEFL_DATA | `Compressed flash download data <#writing-data>`__ | Four 32-bit words: data size, sequence number, ``0``, ``0``, then data. Uses `Checksum`_. | Error code ``0xC1`` on checksum error. |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x12`` | FLASH_DEFL_END | `End compressed flash download <#writing-data>`__ | One 32-bit word: ``0`` to reboot, ``1`` to run user code. Not necessary to send this command if you wish to stay in the loader. | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x13`` | SPI_FLASH_MD5 | `Calculate MD5 of flash region <#verifying-uploaded-data>`__ | Four 32-bit words: address, size, ``0``, ``0`` | Body contains 16 raw bytes of MD5 followed by 2 status bytes (stub loader) or 32 hex-coded ASCII (ROM loader) of calculated MD5 |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+
+.. only:: not esp8266 and not esp32
+
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | Byte | Name | Description | Input Data | Output Data |
+ +============+======================+================================================================+================================================================================================================================================================================================================================================+===================================================================================================================================+
+ | ``0x02`` | FLASH_BEGIN | `Begin Flash Download <#writing-data>`__ | Four 32-bit words: size to erase, number of data packets, data size in one packet, flash offset. A fifth 32-bit word passed to ROM loader only: ``1`` to begin encrypted flash, ``0`` to not. | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x03`` | FLASH_DATA | `Flash Download Data <#writing-data>`__ | Four 32-bit words: data size, sequence number, ``0``, ``0``, then data. Uses `Checksum`_. | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x04`` | FLASH_END | `Finish Flash Download <#writing-data>`__ | One 32-bit word: ``0`` to reboot, ``1`` to run user code. Not necessary to send this command if you wish to stay in the loader | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x05`` | MEM_BEGIN | `Begin RAM Download Start <#writing-data>`__ | Total size, number of data packets, data size in one packet, memory offset | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x06`` | MEM_END | `Finish RAM Download <#writing-data>`__ | Two 32-bit words: execute flag, entry point address | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x07`` | MEM_DATA | `RAM Download Data <#writing-data>`__ | Four 32-bit words: data size, sequence number, ``0``, ``0``, then data. Uses `Checksum`_. | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x08`` | SYNC | `Sync Frame <#initial-synchronisation>`__ | 36 bytes: ``0x07 0x07 0x12 0x20``, followed by 32 x ``0x55`` | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x09`` | WRITE_REG | `Write 32-bit memory address <#32-bit-readwrite>`__ | Four 32-bit words: address, value, mask and delay (in microseconds) | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x0a`` | READ_REG | `Read 32-bit memory address <#32-bit-readwrite>`__ | Address as 32-bit word | Read data as 32-bit word in ``value`` field. |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x0b`` | SPI_SET_PARAMS | `Configure SPI flash <#spi-set-parameters>`__ | Six 32-bit words: id, total size in bytes, block size, sector size, page size, status mask. | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x0d`` | SPI_ATTACH | `Attach SPI flash <#spi-attach-command>`__ | 32-bit word: Zero for normal SPI flash. A second 32-bit word (should be ``0``) is passed to ROM loader only. | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x0f`` | CHANGE_BAUDRATE | `Change Baud rate <#initial-synchronisation>`__ | Two 32-bit words: new baud rate, ``0`` if we are talking to the ROM loader or the current/old baud rate if we are talking to the stub loader. | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x10`` | FLASH_DEFL_BEGIN | `Begin compressed flash download <#writing-data>`__ | Four 32-bit words: uncompressed size, number of data packets, data packet size, flash offset. With stub loader the uncompressed size is exact byte count to be written, whereas on ROM bootloader it is rounded up to flash erase block size. | |
+ | | | | A fifth 32-bit word passed to ROM loader only: ``1`` to begin encrypted flash, ``0`` to not. | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x11`` | FLASH_DEFL_DATA | `Compressed flash download data <#writing-data>`__ | Four 32-bit words: data size, sequence number, ``0``, ``0``, then data. Uses `Checksum`_. | Error code ``0xC1`` on checksum error. |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x12`` | FLASH_DEFL_END | `End compressed flash download <#writing-data>`__ | One 32-bit word: ``0`` to reboot, ``1`` to run user code. Not necessary to send this command if you wish to stay in the loader. | |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x13`` | SPI_FLASH_MD5 | `Calculate MD5 of flash region <#verifying-uploaded-data>`__ | Four 32-bit words: address, size, ``0``, ``0`` | Body contains 16 raw bytes of MD5 followed by 2 status bytes (stub loader) or 32 hex-coded ASCII (ROM loader) of calculated MD5 |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+ | ``0x14`` | GET_SECURITY_INFO | Read chip security info | | {IDF_TARGET_SECURITY_INFO} |
+ +------------+----------------------+----------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
+
+Supported by Stub Loader Only
+"""""""""""""""""""""""""""""
+
+ROM loaders will not recognize these commands.
+
++------------+-------------------+-----------------------------------+-------------------------------------------------------------------------------------------------------------------------+----------+
+| Byte | Name | Description | Input | Output |
++============+===================+===================================+=========================================================================================================================+==========+
+| ``0xd0`` | ERASE_FLASH | Erase entire flash chip | | |
++------------+-------------------+-----------------------------------+-------------------------------------------------------------------------------------------------------------------------+----------+
+| ``0xd1`` | ERASE_REGION | Erase flash region | Two 32-bit words: flash offset to erase, erase size in bytes. Both must be multiples of flash sector size. | |
++------------+-------------------+-----------------------------------+-------------------------------------------------------------------------------------------------------------------------+----------+
+| ``0xd2`` | READ_FLASH | `Read flash <#reading-flash>`__ | Four 32-bit words: flash offset, read length, flash sector size, read packet size, maximum number of un-acked packets | |
++------------+-------------------+-----------------------------------+-------------------------------------------------------------------------------------------------------------------------+----------+
+| ``0xd3`` | RUN_USER_CODE | Exits loader and runs user code | | |
++------------+-------------------+-----------------------------------+-------------------------------------------------------------------------------------------------------------------------+----------+
+
+.. only:: not esp8266 and not esp32
+
+ .. _supported-in-sdm:
+
+ Supported in Secure Download Mode
+ """""""""""""""""""""""""""""""""
+
+ Secure Download Mode is a restricted version of the ROM Loader available on Espressif chips. It only allows a limited set of commands:
+
+ * synchronisation (``SYNC``)
+ * attaching SPI flash (``SPI_ATTACH``)
+ * updating SPI config (``SPI_SET_PARAMS``)
+ * changing baud rate (``CHANGE_BAUDRATE``)
+ * basic flash write (``FLASH_BEGIN``, ``FLASH_DATA``, ``FLASH_END``)
+ * reading a summary of currently enabled security features (``GET_SECURITY_INFO``)
+
+ Any other command (e.g., reading or writing memory, arbitrary code execution through loading to RAM, ...) will result in an error.
+
+ You can read more about Secure Download Mode in the `ESP-IDF Security Overview <https://docs.espressif.com/projects/esp-idf/en/stable/{IDF_TARGET_PATH_NAME}/security/security.html#uart-download-mode>`__ or read about its :ref:`limitations here <sdm-limitations>`.
+
+Checksum
+^^^^^^^^
+
+The checksum field is ignored (can be zero) for all commands except for MEM_DATA, FLASH_DATA, and FLASH_DEFL_DATA.
+
+Each of the ``_DATA`` command packets (like ``FLASH_DEFL_DATA``, ``MEM_DATA``) has the same "data payload" format:
+
++---------+--------------------------+----------------------------------------------------------------+
+| Bytes | Name | Format |
++=========+==========================+================================================================+
+| 0-3 | "Data to write" length | Little endian 32-bit word. |
++---------+--------------------------+----------------------------------------------------------------+
+| 4-7 | Sequence number | Little endian 32-bit word. The sequence numbers are 0 based. |
++---------+--------------------------+----------------------------------------------------------------+
+| 8-15 | 0 | Two words of all zeroes, unused. |
++---------+--------------------------+----------------------------------------------------------------+
+| 16- | "Data to write" | Length given at beginning of payload. |
++---------+--------------------------+----------------------------------------------------------------+
+
+The checksum is only applied to this final "data to write" section, not the first 16 bytes of data.
+
+To calculate checksum, start with seed value 0xEF and XOR each individual byte in the "data to write". The 8-bit result is stored in the checksum field of the packet header (as a little endian 32-bit value).
+
+.. note::
+
+ Because this checksum is not adequate to ensure valid data, the SPI_FLASH_MD5 command was added to validate flash contents after flashing. It is recommended that this command is always used. See `Verifying Uploaded Data`_, below.
+
+Functional Description
+----------------------
+
+.. blockdiag:: diag/download_procedure_chart.diag
+ :caption: Download procedure flow chart
+ :align: center
+
+
+.. note::
+ This flow chart is used to illustrate the download procedure (writing to flash), other commands have different flows.
+
+Initialization
+^^^^^^^^^^^^^^
+.. list::
+
+ :esp8266: * The ESP chip is reset into UART bootloader mode. The host starts by sending SYNC commands. These commands have a large data payload which is also used by the ESP chip to detect the configured baud rate. The ESP8266 will initialise at 74800bps with a 26MHz crystal and 115200bps with a 40MHz crystal. However the sync packets can be sent at any baud rate, and the UART peripheral will detect this.
+ :not esp8266: * The ESP chip is reset into UART bootloader mode. The host starts by sending SYNC commands. These commands have a large data payload which is also used by the ESP chip to detect the configured baud rate. {IDF_TARGET_NAME} always initialises at 115200bps. However the sync packets can be sent at any baud rate, and the UART peripheral will detect this.
+ * The host should wait until it sees a valid response to a SYNC command, indicating the ESP chip is correctly communicating.
+ * Chip type detection then uses various methods to identify chip type, subtype, revision, etc. See below.
+ * Esptool then (by default) uses the "RAM Download" sequence to upload :ref:`stub loader <stub>` code to IRAM of the chip. The MEM_END command contains the entry-point address to run the stub loader.
+ The stub loader then sends a custom SLIP packet of the sequence OHAI (``0xC0 0x4F 0x48 0x41 0x49 0xC0``), indicating that it is now running. This is the only unsolicited packet ever sent by the ESP.
+ If the ``--no-stub`` argument is supplied to esptool, this entire step is skipped.
+ :not esp8266: * For commands which need to use the flash, the {IDF_TARGET_NAME} ROM an stub loader requires the SPI_ATTACH and SPI_SET_PARAMS commands. See `SPI Configuration Commands`_.
+ :esp8266: * For stub loader, the host can send a CHANGE_BAUD command to set the baud rate to an explicit value. Compared to auto-detecting during the SYNC pulse, this can be more reliable for setting very high baud rate. Esptool tries to sync at (maximum) 115200bps and then sends this command to go to a higher baud rate, if requested.
+ :not esp8266: * For stub loader and/or {IDF_TARGET_NAME} ROM loader, the host can send a CHANGE_BAUD command to set the baud rate to an explicit value. Compared to auto-detecting during the SYNC pulse, this can be more reliable for setting very high baud rate. Esptool tries to sync at (maximum) 115200bps and then sends this command to go to a higher baud rate, if requested.
+
+Initialization - Chip Type Detection
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+{IDF_TARGET_NAME} Chip Detection
+""""""""""""""""""""""""""""""""
+.. only:: esp8266 or esp32
+
+ {IDF_TARGET_NAME} does not support **GET_SECURITY_INFO (0x14)** command and its **chip-id** value. So, chip is detected by using **READ_REG** and his magic value.
+
+.. only:: esp32s2
+
+ {IDF_TARGET_NAME} supports the **GET_SECURITY_INFO (0x14)** command, but the output lacks the **chip-id**. Therefore, esptool uses the **magic register** as a fallback for this chip as well.
+ If reading the register also fails, it indicates the chip is in **secure download** mode.
+
+.. only:: not esp8266 and not esp32 and not esp32s2
+
+ {IDF_TARGET_NAME} is detected by using **GET_SECURITY_INFO (0x14)** command and its **chip-id** value.
+
+
+Overview of Detection for All Chips
+"""""""""""""""""""""""""""""""""""
+.. blockdiag:: diag/chip_type_detection_chart.diag
+ :caption: All chips detection flow chart
+ :align: center
+
+On older devices that do not support the **GET_SECURITY_INFO (0x14)** command (which provides the **chip-id**), esptool falls back to reading a **magic register** to determine the chip type.
+
+The main exception is the **ESP32-S2**: although it supports the **GET_SECURITY_INFO (0x14)** command, the output lacks the **chip-id**. Therefore, esptool uses the **magic register** as a fallback for this chip as well.
+If reading the register also fails, it indicates the chip is in **secure download** mode.
+
+For details see: `esptool chip detection code <https://github.com/espressif/esptool/blob/v5.0.2/esptool/cmds.py#L101>`__
+
+Writing Data
+^^^^^^^^^^^^
+
+(Includes RAM Download, Flash Download, Compressed Flash Download.)
+
+.. list::
+
+ * RAM Download (MEM_BEGIN, MEM_DATA, MEM_END) loads data into the ESP chip memory space and (optionally) executes it.
+ * Flash Download (FLASH_BEGIN, FLASH_DATA) flashes data into the ESP SPI flash.
+ :esp8266: * Compressed Flash Download is the same, only the data is compressed using the gzip Deflate algorithm to reduce serial overhead. Not supported on ESP8266 ROM loader.
+ :not esp8266: * Compressed Flash Download is the same, only the data is compressed using the gzip Deflate algorithm to reduce serial overhead.
+
+All three of these sequences follow a similar pattern:
+
+* A _BEGIN command (FLASH_BEGIN, etc) is sent which contains basic parameters for the flash erase size, start address to write to, etc. The uploader also needs to specify how many "blocks" of data (ie individual data packets) will be sent, and how big each packet is.
+* One or more _DATA commands (FLASH_DATA, etc) is sent where the data payload contains the actual data to write to flash/RAM. In the case of Compressed Flash Downloads, the data is compressed using the gzip deflate algorithm. The number of _DATA commands is specified in the _BEGIN command, as is the size of each _DATA payload.
+ The last data block should be padded to the block size with 0xFF bytes.
+* An _END command (FLASH_END, etc) is sent to exit the bootloader and optionally reset the chip (or jump to an address in RAM, in the case of MEM_END). Not necessary to send after flashing if you wish to continue sending other or different commands.
+
+It's not necessary to send flash erase commands before sending commands to write to flash, etc. The ROM loaders erase the to-be-written region in response to the FLASH_BEGIN command.
+The stub loader does just-in-time erasing as it writes data, to maximize overall flashing performance (each block of data is read into RAM via serial while the previous block is simultaneously being written to flash, and 4KB and 64KB erases are done as needed before writing to flash).
+
+The block size chosen should be small enough to fit into RAM of the device. Esptool uses 16KB which gives good performance when used with the stub loader.
+
+.. only:: esp8266
+
+ Erase Size Bug
+ """"""""""""""
+
+ On ESP8266 ROM loader only (not stub loader), there is a bug in the interpretation of the FLASH_BEGIN "erase size" parameter. Consult the ``ESP8266ROM.get_erase_size()`` function in esptool for the algorithm which works around this bug and provides the correct erase size parameter to send to the ESP8266.
+
+ This workaround is not needed if the ESP8266 is running the stub loader.
+
+Verifying Uploaded Data
+"""""""""""""""""""""""
+
+.. only:: esp8266
+
+ The 8-bit checksum used in the upload protocol is not sufficient to ensure valid flash contents after upload. The uploader should send the SPI_FLASH_MD5 command (not supported on ESP8266 ROM loader) or use another method to verify flash contents.
+
+.. only:: not esp8266
+
+ The 8-bit checksum used in the upload protocol is not sufficient to ensure valid flash contents after upload. The uploader should send the SPI_FLASH_MD5 command or use another method to verify flash contents.
+
+The SPI_FLASH_MD5 command passes the start address in flash and the size of data to calculate. The MD5 value is returned in the response payload, before the status bytes.
+
+.. only:: not esp8266
+
+ Note that the {IDF_TARGET_NAME} ROM loader returns the md5sum as 32 hex encoded ASCII bytes, whereas the stub loader returns the md5sum as 16 raw data bytes of MD5 followed by 2 status bytes.
+
+SPI Configuration Commands
+^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+SPI Attach Command
+""""""""""""""""""
+
+The SPI_ATTACH command enables the SPI flash interface. It takes a 32-bit data payload which is used to determine which SPI peripheral and pins should be used to connect to SPI flash.
+
+.. only:: esp8266
+
+ On the ESP8266 stub loader sending this command before interacting with SPI flash is optional. On ESP8266 ROM loader this command is not supported (SPI flash is enabled when the FLASH_BEGIN command is sent).
+
+ +------------------+----------------------------------------------------------------------------------------------------------------------------------+
+ | Value | Meaning |
+ +==================+==================================================================================================================================+
+ | 0 | Default SPI flash interface |
+ +------------------+----------------------------------------------------------------------------------------------------------------------------------+
+ | 1 | HSPI interface |
+ +------------------+----------------------------------------------------------------------------------------------------------------------------------+
+
+.. only:: not esp8266
+
+ On the {IDF_TARGET_NAME} stub loader sending this command before interacting with SPI flash is optional. On {IDF_TARGET_NAME} ROM loader, it is required to send this command before interacting with SPI flash.
+
+ +------------------+----------------------------------------------------------------------------------------------------------------------------------+
+ | Value | Meaning |
+ +==================+==================================================================================================================================+
+ | 0 | Default SPI flash interface |
+ +------------------+----------------------------------------------------------------------------------------------------------------------------------+
+ | 1 | HSPI interface |
+ +------------------+----------------------------------------------------------------------------------------------------------------------------------+
+ | (other values) | Pin numbers as 6-bit values, packed into a 30-bit value. Order (from MSB): HD pin, Q pin, D pin, CS pin, CLK pin. |
+ +------------------+----------------------------------------------------------------------------------------------------------------------------------+
+
+ The "Default SPI flash interface" uses pins configured via the ``SPI_PAD_CONFIG_xxx`` eFuses (if unset, these eFuses are all zero and the default SPI flash pins given in the datasheet are used.)
+
+ When writing the values of each pin as 6-bit numbers packed into the data word, each 6-bit value uses the following representation:
+
+ .. only:: esp32
+
+ * Pin numbers 0 through 30 are represented as themselves.
+ * Pin numbers 32 & 33 are represented as values 30 & 31.
+ * It is not possible to represent pins 30 & 31 or pins higher than 33. This is the same 6-bit representation used by the ``SPI_PAD_CONFIG_xxx`` eFuses.
+
+ On {IDF_TARGET_NAME} ROM loader only, there is an additional 4 bytes in the data payload of this command. These bytes should all be set to zero.
+
+SPI Set Parameters
+""""""""""""""""""
+
+The SPI_SET_PARAMS command sets some parameters of the attached SPI flash chip (sizes, etc).
+
+.. only:: esp8266
+
+ This command is not supported by the ESP8266 ROM loader.
+
+All the values which are passed except total size are hardcoded, and most are not used when writing to flash. See `flash_set_parameters function <https://github.com/espressif/esptool/blob/da31d9d7a1bb496995f8e30a6be259689948e43e/esptool.py#L655>`__ in esptool for the values which it sends.
+
+32-Bit Read/Write
+^^^^^^^^^^^^^^^^^
+
+The 32-bit read/write commands (READ_REG, WRITE_REG) allow word-oriented reading and writing of memory and register data.
+
+These commands can be used to manipulate peripherals in arbitrary ways. For example, the esptool "flash id" functionality is implemented by manipulating the SPI peripheral registers to send a JEDEC flash ID command to the flash chip and read the response.
+
+Reading Flash
+^^^^^^^^^^^^^
+
+The stub loader implements a READ_FLASH command. This command behaves differently to other commands, including the ROM loader's READ_FLASH command:
+
+* The host sends the READ_FLASH command and the data payload contains the offset, read size, size of each individual packet of data, and the maximum number of "un-acknowledged" data packets which can be in flight at one time.
+* The stub loader will send a standard response packet, with no additional data payload.
+* Now the stub loader will start sending SLIP packets with raw data (of the size requested in the command). There is no metadata included with these SLIP packets.
+* After each SLIP packet is received, the host should send back a 4 byte raw SLIP acknowledgement packet with the total number of bytes which have been received. There is no header or other metadata included with these SLIP packets.
+* The stub loader may send up to a maximum number (specified by the host in the READ_FLASH commands) of data packets before waiting for the first acknowledgement packet. No more than this "max in flight" limit can be un-acknowledged at any one time.
+* After all data packets are acknowledged received, the stub loader sends a 16 byte MD5 digest of all the data which was read from flash. This is also sent as a raw SLIP packet, with no metadata.
+
+After the read flash process is complete, the stub loader goes back to normal command/response operation.
+
+The ROM loader read flash command is more normal but also much slower to read data.
+
+.. _tracing-communications:
+
+Tracing Esptool Serial Communications
+-------------------------------------
+
+esptool has a ``--trace`` option which can be supplied in the first group of arguments (before the command). This will dump all traffic sent and received via the serial port to the console.
+
+Here is a sample extract, showing a READ_REG command and response:
+
+::
+
+ TRACE +0.000 --- Cmd READ_REG (0x0a) | data_len 4 | wait_response 1 | timeout 3.000 | data 00100040 ---
+ TRACE +0.000 Write 14 bytes: c0000a04000000000000100040c0
+ TRACE +0.046 Read 1 bytes: c0
+ TRACE +0.000 Read 11 bytes: 010a0200090000000000c0
+ TRACE +0.000 Received full packet: 010a0200090000000000
+
+The +X.XXX value is the time delta (in seconds) since the last trace line.
+
+Values are printed in hexadecimal. If more than 16 bytes is printed at one time, a split display is used with hexadecimal bytes on the left and ASCII on the right. Non-printable characters are represented as ``.`` in ASCII:
+
+Note that multiple protocol layers are represented in the logs. The "Write X bytes" lines show exactly which bytes are being sent "over the wire", including SLIP framing. Similarly the "Read X bytes" lines show what bytes are being read over the wire, including any SLIP framing.
+Once a full SLIP packet is read, the same bytes - as a SLIP payload with any escaping removed - appear in the "Received full packet" log lines.
+
+Here is a second example showing part of the initial synchronization sequence (lots of 0x55 bytes which are ``U`` in ASCII):
+
+::
+
+ TRACE +0.000 Write 46 bytes:
+ c000082400000000 0007071220555555 | ...$........ UUU
+ 5555555555555555 5555555555555555 | UUUUUUUUUUUUUUUU
+ 5555555555555555 5555555555c0 | UUUUUUUUUUUUU.
+ TRACE +0.012 Read 1 bytes: c0
+ TRACE +0.000 Read 63 bytes:
+ 0108040007071220 00000000c0c00108 | ....... ........
+ 0400070712200000 0000c0c001080400 | ..... ..........
+ 0707122000000000 c0c0010804000707 | ... ............
+ 122000000000c0c0 01080400070712 | . .............
+ TRACE +0.000 Received full packet: 010804000707122000000000
+ TRACE +0.000 Received full packet: 010804000707122000000000
+
+.. important::
+
+ If you don't plan to use the esptool stub loader, pass ``--no-stub --trace`` to see interactions with the chip's built-in ROM loader only. Otherwise, the trace will show the full binary upload of the loader.
+
+In addition to this trace feature, most operating systems have "system call trace" or "port trace" features which can be used to dump serial interactions.