diff options
Diffstat (limited to 'src/pardes')
| -rw-r--r-- | src/pardes/app.zig | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/src/pardes/app.zig b/src/pardes/app.zig index 2f13865..5b1431f 100644 --- a/src/pardes/app.zig +++ b/src/pardes/app.zig @@ -185,6 +185,15 @@ export fn zig_main() noreturn { @as(u32, @intCast(heap.len / 1024)), }); + // The CPU clock, before anything is timed against it. The bootloader leaves 90 MHz and the + // CPLL is already at 360, so this is a divider change that disturbs neither UART0 (XTAL) nor + // the systimer (XTAL/2.5) nor the flash interface (SPLL). See hal/clkrst.zig:setCpuFreq. + if (config.cpu_mhz != 90) hal.clkrst.setCpuFreq(switch (config.cpu_mhz) { + 180 => .mhz180, + 360 => .mhz360, + else => .mhz90, + }); + const rwdt_was_armed = hal.rwdt.disable(); hal.systimer.init(); _ = rwdt_was_armed; @@ -208,6 +217,26 @@ export fn zig_main() noreturn { }); while (true) {} } + + // The CPU clock, measured rather than assumed. Every cycle count this firmware reports is + // divided by it somewhere, and `src/io/chip.zig` records it as "a measured ~90 MHz" that + // nothing here reconfigures - so it is worth printing rather than remembering. The systimer is + // XTAL/2.5 = 16 MHz and is NOT derived from the CPU clock (`hal/systimer.zig:31`, + // `clk_tree_defs.h:196-198`), which is exactly what makes it a valid reference for measuring it. + if (prof) { + const t_start = hal.systimer.micros(.unit0) orelse 0; + const c_start = soc.cycles(); + // 50 ms is long enough that the systimer's 16 MHz granularity and the loop's own overhead + // are both noise, and short enough to be invisible in a boot. + while ((hal.systimer.micros(.unit0) orelse 0) -% t_start < 50_000) {} + const elapsed_us = (hal.systimer.micros(.unit0) orelse 0) -% t_start; + const elapsed_cy = soc.cycles() - c_start; + soc.rom.print("MARK CPU_HZ cycles=%u us=%u khz=%u\r\n", .{ + @as(u32, @intCast(elapsed_cy)), + @as(u32, @intCast(elapsed_us)), + @as(u32, @intCast(if (elapsed_us > 0) elapsed_cy * 1000 / elapsed_us else 0)), + }); + } soc.rom.print("MARK PARDES_READY\r\n", .{}); var in: [256]u8 = undefined; |
