diff options
Diffstat (limited to 'src/soc.zig')
| -rw-r--r-- | src/soc.zig | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc.zig b/src/soc.zig index 350948a..1e94874 100644 --- a/src/soc.zig +++ b/src/soc.zig @@ -94,6 +94,11 @@ pub const rom = struct { pub extern fn ets_printf(fmt: [*:0]const u8, ...) c_int; pub extern fn ets_delay_us(us: u32) void; + /// Tell the ROM the CPU's new frequency, in MHz. `ets_delay_us` and everything else built on + /// `g_ticks_per_us` busy-waits by a cycle count derived from it, so a clock change without this + /// makes every ROM delay wrong by exactly the ratio. `esp32p4.rom.ld:32`, 0x4fc00044. + pub extern fn ets_update_cpu_frequency(mhz: u32) void; + /// Invalidate the caches. `map` selects which, from `rom/cache.h:228-236`: /// L1 ICache0 = 1, ICache1 = 2, L1 DCache = 0x10, L2 = 0x20; `cache_all` is all four. /// |