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/* The Kconfig surface ESP-IDF's LL headers are compiled against when they are used as the
* differential reference. Deliberately minimal and deliberately *ours*.
*
* An earlier attempt borrowed sdkconfig.h from an unrelated ESP-IDF project in this workspace. That
* is a trap with a measurable cost: the borrowed file sets CONFIG_HAL_GPIO_USE_ROM_IMPL=1, which
* makes gpio_ll_set_level() call rom_gpio_set_output_level() and write no GPIO register at all -
* so the very first differential would have compared this HAL against the mask ROM rather than
* against IDF's register sequence. Recompiling the same LL headers against a different sdkconfig
* changes the emitted .text of six of nine tier-1/2 peripherals, so this file is part of the
* experiment's definition, not incidental.
*
* Anything not defined here is simply absent, which for IDF's `#if` tests means zero. That is the
* behaviour we want: the register path, with nothing optional switched on.
*/
#pragma once
/* Target selection. Everything under components/soc and components/hal keys off this. */
#define CONFIG_IDF_TARGET_ESP32P4 1
#define CONFIG_IDF_TARGET "esp32p4"
/* Pre-v3 silicon: this die is rev v1.3. The same condition selects register/hw_ver1 in IDF's own
* build (soc/CMakeLists.txt:37-41) and esp32p4.rom.ld rather than esp32p4.rom.eco5.ld - 237 of 452
* common ROM symbols have different addresses between those two files, so the pairing is not
* cosmetic. build.zig asserts the register module was built from hw_ver1 to match. */
#define CONFIG_ESP32P4_SELECTS_REV_LESS_V3 1
#define CONFIG_ESP32P4_REV_MIN_FULL 100
#define CONFIG_ESP32P4_REV_MAX_FULL 199
/* 40 MHz crystal, as fitted. Reaches the HAL through HAL_CONFIG_XTAL_HINT_FREQ_MHZ. */
#define CONFIG_XTAL_FREQ 40
/* Assertions off, and this one is a real choice rather than tidiness: at level 2 HAL_ASSERT expands
* to __assert_func (a libc symbol this image does not have), and at 0 it becomes
* __builtin_unreachable(), which lets clang delete the argument-checking branches. The reference
* implementation should be the code IDF ships in a release build, and a harness that wants to test
* argument validation must not rely on a branch the compiler is entitled to remove. */
#define CONFIG_HAL_DEFAULT_ASSERTION_LEVEL 0
/* NOT defined, on purpose:
* CONFIG_HAL_GPIO_USE_ROM_IMPL - would route gpio_ll_set_level through the mask ROM (see above).
* CONFIG_IDF_ENV_FPGA - would change efuse and clock behaviour to the FPGA model.
* CONFIG_PM_*, CONFIG_FREERTOS_* - no power management and no OS in this image.
*/
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