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-rw-r--r--src/9p_io.zig2
-rw-r--r--src/esp32p4/uart.zig2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/9p_io.zig b/src/9p_io.zig
index 0cb7b960..6cf75c99 100644
--- a/src/9p_io.zig
+++ b/src/9p_io.zig
@@ -719,7 +719,7 @@ pub const Listener = struct {
/// `cloud9.post`: `post` claims flat names only, and its claim
/// protocol derives its lock directory from the registry path, so
/// a name inside a subdirectory cannot go through it yet. See
- /// docs/cloud9.md.
+ /// docs/typ/building.typ.
fn postToRegistry(l: *Listener, name: []const u8) void {
if (comptime !supported) return;
if (name.len == 0 or std.mem.indexOfAny(u8, name, "/\x00") != null) return;
diff --git a/src/esp32p4/uart.zig b/src/esp32p4/uart.zig
index 15599423..5690520c 100644
--- a/src/esp32p4/uart.zig
+++ b/src/esp32p4/uart.zig
@@ -100,7 +100,7 @@ pub fn writeSome(bytes: []const u8) usize {
/// running on. Nothing is touched when it is not.
///
/// THE ONE EXCEPTION to this file's rule, and see the header for who may call it: not this file, not
-/// `app.zig`, only an image whose host side is opened at the same rate. `docs/registry.typ`
+/// `app.zig`, only an image whose host side is opened at the same rate. `docs/registry.pdf`
/// `BOARD-1` has the numbers — 921600 is one `UART_CLKDIV_SYNC` write on the existing 40 MHz XTAL,
/// int 43 frag 6, +0.064% error, and it takes a byte from 86.8 µs to 10.85 µs.
///